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TSL2301

TAOS
Part Number TSL2301
Manufacturer TAOS
Description 102 X 1 LINEAR OPTICAL SENSOR ARRAY
Published Oct 5, 2008
Detailed Description t t TSL2301 102 × 1 LINEAR OPTICAL SENSOR ARRAY WITH ANALOGĆTOĆDIGITAL CONVERTER TAOS007 – JULY 2000 D D D D D D D 1...
Datasheet PDF File TSL2301 PDF File

TSL2301
TSL2301


Overview
t t TSL2301 102 × 1 LINEAR OPTICAL SENSOR ARRAY WITH ANALOGĆTOĆDIGITAL CONVERTER TAOS007 – JULY 2000 D D D D D D D 102 × 1 Sensor Element Organization 300 Dots-per-Inch Pixel Pitch On-Chip 8-Bit Analog-to-Digital Converter Three-Zone Programmable Offset (Dark Level) and Gain High Speed (10 MHz) Clocked Serial Interface 1-MHz Pixel Rate Single 5-V Supply (TOP VIEW) SCLK VDD SDIN SDOUT 1 2 3 4 8 7 6 5 NC GND GND NC NC – No internal connection Description The TSL2301 is a 300-dpi, 102-pixel linear optical sensor array with an integrated 8-bit analog-to-digital converter.
The pixels are on 85-µm centers and measure 85 µm (H) by 77 µm (W) with 8 µm between pixels.
Associated with each pixel is a charge integrator/amplifier and sample-hold circuit.
All pixels have concurrent integration periods and sampling times.
Data communication is accomplished through a three-wire serial interface.
The array is split into three 34-pixel zones, with each zone having programmable gain and offset levels.
The TSL2301 is intended for use in high-performance, cost-critical imaging and optical sensing applications.
www.
DataSheet4U.
com Functional Block Diagram PIXEL ARRAY WITH INTEGRATORS AND S-H PIXCLK SI HOLD ZERO LEFT EVEN RIGHT ODD RIGHT EVEN IREF 8 SCLK SDIN SDOUT DIGITAL I/O AND CONTROL 5 DB<7:0> ADDR<4:0> READ WRITE OUTPUT CHARGE-TOVOLTAGE CONVERTER WITH PROGRAMMABLE GAINS AND OFFSETS VREF IREF BIAS BLOCK 3 SECTOR RESET/SAMPLE START ADCLK DUAL 8-BIT SA ADC VREF IREF www.
taosinc.
com Texas Advanced Optoelectronic Solutions Inc.
800 Jupiter Road, Suite 205 S Plano, TX 75074 S (972) 673-0759 t t Copyright E 2000, TAOS Inc.
1 TSL2301 102 × 1 LINEAR OPTICAL SENSOR ARRAY WITH ANALOGĆTOĆDIGITAL CONVERTER TAOS007 – JULY 2000 Terminal Functions TERMINAL NAME GND SCLK SDIN SDOUT VDD NO.
6, 7 1 3 4 2 I/O Ground Clock input for SDIN and SDOUT Serial data input.
Data is clocked in on the rising edge of CLK.
Serial data output.
Data is clocked out on the falling ed...



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