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LH52256CH

Sharp Electrionic Components
Part Number LH52256CH
Manufacturer Sharp Electrionic Components
Description CMOS 256K (32K x 8) Static RAM
Published Mar 22, 2005
Detailed Description LH52256C/CH FEATURES • 32,768 × 8 bit organization • Access time: 70 ns (MAX.) • Supply current: Operating: 45 mA (MAX.)...
Datasheet PDF File LH52256CH PDF File

LH52256CH
LH52256CH

Overview
LH52256C/CH FEATURES • 32,768 × 8 bit organization • Access time: 70 ns (MAX.
) • Supply current: Operating: 45 mA (MAX.
) 10 mA (MAX.
) (tRC, tWC = 1 µs) Standby: 40 µA (MAX.
) • Data retention current: 1.
0 µA (MAX.
) (VCCDR = 3 V, TA = 25 °C) • Wide operating voltage range: 4.
5 V ± 5.
5 V • Operating temperature: Commerical temperature 0°C to +70 °C Industrial temperature -40° to +85°C • Fully-static operation • Three-state outputs • Not designed or rated as radiation hardened • Package: 28-pin, 600-mil DIP 28-pin, 450-mil SOP 28-pin, 300-mil SK-DIP 28-pin, 8 × 3 mm2 TSOP (Type I) • N-type bulk silicon DESCRIPTION The LH52256C is a Static RAM organized as 32,768 × 8 bits which provides low-power standby mode.
It is fabricated using silicon-gate CMOS process technology.
CMOS 256K (32K × 8) Static RAM PIN CONNECTIONS 28-PIN DIP 28-PIN SK-DIP 28-PIN SOP A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A13 A8 A9 A11 OE A10 CE I/O8 I/O7 I/O6 I/O5 I/O4 52256C-1 TOP VIEW Figure 1.
Pin Connections 28-PIN TSOP (Type I) OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 CE I/O8 I/O7 I/O6 I/O5 I/O4 GND I/O3 I/O2 I/O1 A0 A1 A2 NOTE: Reverse bend available on request.
52256C-8 Figure 2.
TSOP (Type I) Pin Connections 1 LH52256C/CH CMOS 256K (32K × 8) Static RAM A8 25 A14 1 A13 26 A12 2 A7 3 ROW DECORDER A6 4 A5 5 A4 6 11 I/O1 12 I/O2 COLUMN I/O CIRCUIT COLUMN DECODER 8 OUTPUT BUFFERS 13 I/O3 15 I/O4 16 I/O5 17 I/O6 18 I/O7 19 I/O8 A3 7 MEMORY ARRAY (512 x 512) 28 VCC 14 GND 8 INPUT DATA CONTROL WE 27 OE 22 CE 20 10 9 8 21 24 23 A0 A1 A2 A10 A9 A11 52256C-2 Figure 3.
LH52256C Block Diagram PIN DESCRIPTION SIGNAL PIN NAME SIGNAL PIN NAME A0 - A14 CE WE OE Address inputs Chip enable Write enable Output enable I/O1 - I/O8 VCC GND Data inputs and outputs Power supply Ground 2 CMOS 256K (32K × 8) Static RAM ...


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