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ZL62089

Zarlink Semiconductor
Part Number ZL62089
Manufacturer Zarlink Semiconductor
Description 2x6.25 Gb/s TIA/LA Receiver
Published Dec 10, 2008
Detailed Description ZL62089 12x6.25 Gb/s TIA/LA Receiver Data Sheet January 2008 Features • • • • 12-channel integrated transimpedance and ...
Datasheet PDF File ZL62089 PDF File

ZL62089
ZL62089

Overview
ZL62089 12x6.
25 Gb/s TIA/LA Receiver Data Sheet January 2008 Features • • • • 12-channel integrated transimpedance and limiting amplifier operates up to 6.
25 Gb/s 12 uAPP receiver sensitivity for 10-12 BER at 6.
25 Gb/s Single +3.
3 V supply dissipating 140 mW per channel Selectable analog multiplexer provides junction temperature, supply voltage, and received signal strength for each channel Individual channel signal detect compares input signal strength with adjustable threshold Squelch automatically disables output when input signal strength falls below programmable threshold 2-wire interface provides access to internal registers CML output with selectable pre-emphasis and output amplitude control 250-micron channel pitch matches optical ribbon fiber and photodiode arrays IC dimensions 2245 x 3870 um Description The growing use of the Internet has created increasingly higher demand for multi-Gb/s I/O performance.
The demand for 40 Gb/s bandwidth and beyond fuels the growth of shortreach 10 Gb/s infrastructures within high-end telco and datacom routers, switches, servers and other proprietary chassis-to-chassis links.
The transimpedance amplifier achieves a nominal 5 GHz bandwidth over a wide range of photodiode input capacitance.
Excellent channelto-channel isolation ensures data integrity at the receiver sensitivity limits.
An internal circuit provides the photodiode reverse bias voltage supply and senses average photocurrent supplied to the photodiode array.
The transimpedance amplifier is AC-coupled internally to a high-gain, high-bandwidth, differential, limiting amplifier.
The limiting amplifier provides a differential back-terminated CML output that can be used to drive 6.
25 Gb/s per channel transceivers or other CML compatible clock and data recovery circuits.
The CML output provides selectable pre-emphasis control to improve signal quality.
The limiting amplifier features a circuit that senses optical modulation amplitude (OMA) to determine a loss of sign...


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