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ICS8302-01

Integrated Circuit Systems
Part Number ICS8302-01
Manufacturer Integrated Circuit Systems
Description 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT
Published Dec 18, 2008
Detailed Description Integrated Circuit Systems, Inc. ICS8302-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT FEATU...
Datasheet PDF File ICS8302-01 PDF File

ICS8302-01
ICS8302-01

Overview
Integrated Circuit Systems, Inc.
ICS8302-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT FEATURES • Complementary LVCMOS / LVTTL output • LVCMOS / LVTTL clock input accepts LVCMOS or LVTTL input levels • Maximum output frequency: 250MHz • Output skew: 165ps (maximum) • Part-to-part skew: 800ps (maximum) • Small 8 lead SOIC package saves board space • Full 3.
3V or 3.
3V core, 2.
5V supply modes • 0°C to 70°C ambient operating temperature • Industrial temperature information available upon request GENERAL DESCRIPTION T h e I C S 8 3 0 2-01 i s a l o w s k e w, 1 - t o - 2 LVCMOS/LVTTL Fanout Buffer w/ComplemenHiPerClockS™ tary Output and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.
The ICS8302-01 has a single ended clock input.
The single ended clock input accepts LVCMOS or LVTTL input levels.
The ICS8302-01 is characterized at full 3.
3V for input VDD, and mixed 3.
3V and 2.
5V for o u t p u t o p e r a t i n g s u p p l y m o d e s (V DDO).
G u a r a n t e e d www.
DataSheet4U.
com output and part-to-part skew characteristics make the I C S 8 3 0 2-01 i d e a l f o r clock distribution applications demanding well defined performance and repeatability.
,&6 BLOCK DIAGRAM Q CLK nQ PIN ASSIGNMENT VDDO VDD CLK GND 1 2 3 4 8 7 6 5 Q GND VDDO nQ ICS8302-01 8-Lead SOIC 3.
8mm x 4.
8mm, x 1.
47mm package body M Package Top View 8302AM-01 www.
icst.
com/products/hiperclocks.
html 1 REV.
A DECEMBER 10, 2002 Integrated Circuit Systems, Inc.
ICS8302-01 LOW SKEW, 1-TO-2 LVCMOS / LVTTL FANOUT BUFFER W/ COMPLEMENTARY OUTPUT Type Power Power Input Power Output Output Pulldown Description Output supply pins.
Core supply pin.
LVCMOS / LVTTL clock input.
Power supply ground.
Complementary clock output.
LVCMOS / LVTTL interface levels.
Clock output.
LVCMOS / LVTTL interface levels.
TABLE 1.
PIN DESCRIPTIONS Number 1, 6 2 3 4,7 5 www.
DataSheet4U.
com 8 Name VDDO VDD CLK GND nQ Q NOTE: Pullup and Pulldown refer to internal inpu...


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