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KM68257C

Samsung semiconductor
Part Number KM68257C
Manufacturer Samsung semiconductor
Description 32Kx8 Bit High Speed Static RAM
Published Dec 19, 2008
Detailed Description KM68257C/CL Document Title PRELIMINARY CMOS SRAM 32Kx8 Bit High Speed Static RAM(5V Operating), Evolutionary Pin out. ...
Datasheet PDF File KM68257C PDF File

KM68257C
KM68257C

Overview
KM68257C/CL Document Title PRELIMINARY CMOS SRAM 32Kx8 Bit High Speed Static RAM(5V Operating), Evolutionary Pin out.
Operated at Commercial Temperature Range.
Revision History Rev No.
Rev.
0.
0 Rev.
1.
0 www.
DataSheet4U.
com History Initial release with Preliminary.
Release to final Data Sheet.
1.
Delete Preliminary Update A.
C parameters 2.
1.
Updated A.
C parameters Previous spec.
Updated spec.
Items (12/15/20ns part) (12/15/20ns part) tOE - / 8/10ns - / 7 /9 ns tCW - /12/ - ns - /11/ - ns tHZ 8/10/10ns 6/7/8ns tOHZ - / 8 / - ns - / 7 / - ns tDW - / 9 / - ns - / 8 / - ns 2.
2.
Add Voh1=3.
95V with the test condition as Vcc=5V±5% at 25°C 3.
1.
Add 28-TSOP1 Package.
3.
2.
Add L-version.
3.
3.
Add Data Rentention Characteristics.
Draft Data Apr.
1st, 1994 May 14th,1994 Remark Preliminary Final Rev.
2.
0 Oct.
4th, 1994 Final Rev.
3.
0 Feb.
22th, 1996 Final The attached data sheets are prepared and approved by SAMSUNG Electronics.
SAMSUNG Electronics CO.
, LTD.
reserve the right to change the specifications.
SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device.
If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1Rev 3.
0 February-1996 KM68257C/CL 32K x 8 Bit High-Speed CMOS Static RAM FEATURES Fast Access Time 12, 15, 20§À(Max.
) Low Power Dissipation Standby (TTL) : 40§Ì(Max.
) (CMOS) : 2§Ì(Max.
) 0.
1§Ì(Max.
)- L-ver.
only Operating KM68257C/CL - 12 : 165§Ì(Max.
) KM68257C/CL - 15 : 150§Ì(Max.
) KM68257C/CL - 20 : 140§Ì(Max.
) www.
DataSheet4U.
com Single 5.
0V±10% Power Supply TTL Compatible Inputs and Outputs I/O Compatible with 3.
3V Device Fully Static Operation - No Clock or Refresh required Three State Outputs Low Data Retention Voltage : 2V(Min.
)- L-ver.
only Standard Pin Configuration KM68257C/CLP : 28-DIP-300 KM68257C/CLJ : 28-SOJ-300 KM68257C/CLTG : 28-TSOP1-0813, 4F ¡Ü ¡Ü ¡Ü ¡Ü ¡Ü ¡Ü ¡Ü ¡Ü ¡Ü PRELIMINARY CMOS SRAM GENERAL DESCRIPTION The KM68257C i...


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