DatasheetsPDF.com

AS7C33256PFS18A

Alliance Semiconductor Corporation
Part Number AS7C33256PFS18A
Manufacturer Alliance Semiconductor Corporation
Description (AS7C33256PFS16A / AS7C33256PFS18A) 3.3V 256K X 16/18 pipeline burst synchronous SRAM
Published Jan 1, 2009
Detailed Description March 2001 ® AS7C33256PFS16A AS7C33256PFS18A 3.3V 256K × 16/18 pipeline burst synchronous SRAM Features • Organization...
Datasheet PDF File AS7C33256PFS18A PDF File

AS7C33256PFS18A
AS7C33256PFS18A


Overview
March 2001 ® AS7C33256PFS16A AS7C33256PFS18A 3.
3V 256K × 16/18 pipeline burst synchronous SRAM Features • Organization: 262,144 words × 16 or 18 bits • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.
5/3.
8/4.
0/5.
0 ns • Fast OE access time: 3.
5/3.
8/4.
0/5.
0 ns • Fully synchronous register-to-register operation • “Flow-through” mode • Single-cycle deselect - Dual-cycle deselect also available (AS7C33256PFD16A/ www.
DataSheet4U.
com AS7C33256PFD18A) • Pentium®* compatible architecture and timing • Asynchronous output enable control • Economical 100-pin TQFP package • Byte write enables • Multiple chip enables for easy expansion • 3.
3V core power supply • 2.
5V or 3.
3V I/O operation with separate VDDQ • 30 mW typical standby power in power down mode • NTD™* pipeline architecture available (AS7C33256NTD16A/AS7C33256NTD18A) Logic block diagram LBO CLK ADV ADSC ADSP A[17:0] CLK CS CLR Pin arrangement 256K × 16/18 Memory array 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 Burst logic Q A6 A7 CE0 CE1 NC NC BWb BWa CE2 VDD VSS CLK GWE BWE OE ADSC ADSP ADV A8 A9 18 D CS CLK 18 16 18 Address register NC NC NC VDDQ VSSQ NC NC DQb DQb VSSQ VDDQ DQb DQb FT VDD NC VSS DQb DQb VDDQ VSSQ DQb DQb DQpb/NC NC VSSQ VDDQ NC NC NC 16/18 16/18 GWE BWb BWE BWa CE0 CE1 CE2 D DQb Q Byte Write registers Byte Write registers CLK D CLK D DQa Q 2 OE Enable Q register Enable Q delay register CE CLK Output registers CLK Input registers CLK ZZ Power down D CLK OE FT DATA [17:0] DATA [15:0] Selection guide AS7C33256PFS16A AS7C33256PFS16A AS7C33256PFS16A AS7C33256PFS16A –166 –150 –133 –100 Units Minimum cycle time Maximum pipelined clock frequency Maximum pipelined clock access time Maximum operating current Maximum standby current Maximum CMOS standby current (DC) * 6 166 3.
5 475 130 30 6.
7 150 3.
8 450 110 30 LBO A5 A4 A3 A2 A1 A0 NC NC VSS VDD NC NC A10 A11 A12 A13 A14 A15 A16 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 4...



Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)