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CY7C1215F

Part Number	CY7C1215F
Manufacturer	Cypress Semiconductor
Description	1-Mb (32K x 32) Pipelined Sync SRAM
Published	Mar 18, 2009
Detailed Description	CY7C1215F www.DataSheet4U.com 1-Mb (32K x 32) Pipelined Sync SRAM Features • Registered inputs and outputs for pipeline...
Datasheet	CY7C1215F PDF File

Overview

CY7C1215F www.
DataSheet4U.
com 1-Mb (32K x 32) Pipelined Sync SRAM Features • Registered inputs and outputs for pipelined operation • 32K × 32 common I/O architecture • 3.
3V core power supply • 3.
3V I/O operation • Fast clock-to-output times — 3.
5ns (for 166-MHz device) — 4.
0 ns (for 133-MHz device) • Provide high-performance 3-1-1-1 access rate • User-selectable burst counter supporting Intel Pentium® interleaved or linear burst sequences • Separate processor and controller address strobes • Synchronous self-timed writes • Asynchronous output enable • Offered in JEDEC-standard 100-pin TQFP package • “ZZ” Sleep Mode Option counter for internal burst operation.
All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).
The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE1), depth-expansion Chip Enables (CE2 and CE3), Burst Control inputs (ADSC, ADSP, and ADV), Write Enables (BW[A:D], and BWE), an...

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