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LTC2241-12

Linear Technology
Part Number LTC2241-12
Manufacturer Linear Technology
Description 12-Bit ADC
Published Jun 1, 2009
Detailed Description LTC2241-12 12-Bit, 210Msps ADC Features n Sample Rate: 210Msps n 65.5dB SNR n 78dB SFDR n 1.2GHz Full Power Bandwidth S...
Datasheet PDF File LTC2241-12 PDF File

LTC2241-12
LTC2241-12

Overview
LTC2241-12 12-Bit, 210Msps ADC Features n Sample Rate: 210Msps n 65.
5dB SNR n 78dB SFDR n 1.
2GHz Full Power Bandwidth S/H n Single 2.
5V Supply n Low Power Dissipation: 585mW n LVDS, CMOS, or Demultiplexed CMOS Outputs n Selectable Input Ranges: ±0.
5V or ±1V n No Missing Codes n Optional Clock Duty Cycle Stabilizer n Shutdown and Nap Modes n Data Ready Output Clock n Pin Compatible Family 250Msps: LTC2242-12 (12-Bit), LTC2242-10 (10-Bit) 210Msps: LTC2241-12 (12-Bit), LTC2241-10 (10-Bit) 170Msps: LTC2240-12 (12-Bit), LTC2240-10 (10-Bit) 185Msps: LTC2220-1 (12-Bit)* 170Msps: LTC2220 (12-Bit), LTC2230 (10-Bit)* 135Msps: LTC2221 (12-Bit), LTC2231 (10-Bit)* n 64-Pin 9mm × 9mm QFN Package Applications n Wireless and Wired Broadband Communication n Cable Head-End Systems n Power Amplifier Linearization n Communications Test Equipment Description The LTC®2241-12 is a 210Msps, sampling 12-bit A/D converter designed for digitizing high frequency, wide dynamic range signals.
The LTC2241-12 is perfect for demanding communications applications with AC performance that includes 65.
5dB SNR and 78dB SFDR.
Ultralow jitter of 95fsRMS allows IF undersampling with excellent noise performance.
DC specs include ±0.
7LSB INL (typ), ±0.
4LSB DNL (typ) and no missing codes over temperature.
The digital outputs can be either differential LVDS, or single-ended CMOS.
There are three format options for the CMOS outputs: a single bus running at the full data rate or two demultiplexed buses running at half data rate with either interleaved or simultaneous update.
A separate output power supply allows the CMOS output swing to range from 0.
5V to 2.
625V.
The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs.
An optional clock duty cycle stabilizer allows high performance over a wide range of clock duty cycles.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation.
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