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NJU26206

JRC
Part Number NJU26206
Manufacturer JRC
Description Dolby Pro Logic IIx / Virtual Dolby Surround Decoder
Published Jun 13, 2009
Detailed Description NJU26206 Dolby Pro Logic IIx / Virtual Dolby Surround Decoder General Description The NJU26206 processes the stereo ma...
Datasheet PDF File NJU26206 PDF File

NJU26206
NJU26206

Overview
NJU26206 Dolby Pro Logic IIx / Virtual Dolby Surround Decoder General Description The NJU26206 processes the stereo matrix-encoded signal(Lt/Rt) or normal stereo signal into spacious sound of 7.
1(max) channels by Dolby Pro Logic IIx.
The NJU26206 provides not only Dolby Pro Logic IIx but also Virtual Dolby Surround, Bass Management, Multi channel input, 5 Band PEQ, and Lip-Sync Delay function.
The NJU26206 is suitable for multi-channel products such as Car Audio, or 2 channel products such as LCD-TV, and Plasma-TV.
■Package NJU26206V Features -Software Dolby Pro Logic II Dolby Pro Logic IIx (Max 7.
1ch Output) Virtual Dolby Surround (algorithm of Dolby Laboratories) Bass Management 5 Band PEQ Lip-Sync Delay function (Digital Audio Delay) Sampling Frequency 32kHz/44.
1kHz/48kHz (In Master mode, DSP can’t generate a required system clock 44.
1kHz of sampling frequency.
) -Hardware 24bit Fixed-point Digital Signal Processing Maximum Clock Frequency : 12.
288MHz(Standard), built-in PLL Circuit Digital Audio Interface : 4 Input ports / 4 Output ports Digital Audio Format : I2S 24bit, left-justified, right-justified, Master / Slave Mode - In Master mode, MCK : 256fs @fs=48kHz / 384fs @fs=32kHz Microcomputer Interface - I2C Bus (Standard-mode/100kbps, Fast-mode/400kbps) - 4 -Wire Serial Bus (4-Wire: Clock, Enable, Input data, Output data) Operating Voltage : VDD = VDDPLL = 1.
8V : VDDIO = 3.
3V Input Terminal : 5.
0V Input tolerant Package : SSOP44 (Pb-Free) BCK : 32fs/64fs * The detail hardware specification of the NJU26206 is described in the “ NJU26200 Series Hardware Data Sheet”.
Ver.
2008-12-01 -1- NJU26206 Block Diagram AD1/SDIN AD2/SSb NJU26206 SCL/SCK SDA/SDOUT RESETb MCK CLK CLKOUT SERIAL HOST INTERFACE 24bit Fixed-point DSP Core PROGRAM CONTROL ALU 24-BIT x 24-BIT MULTIPLIER TIMING GENERATOR / PLL ADDRESS GENERATION UNIT SERIAL AUDIO INTERFACE LB/RB, Monitor L/R C/SW SL/SR DATA RAM FIRMWARE ROM General I/O INTERFACE BCKO LRO SDO0 ...


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