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AD9804

Analog Devices
Part Number AD9804
Manufacturer Analog Devices
Description Complete 10-Bit 18 MSPS CCD Signal Processor
Published Dec 23, 2009
Detailed Description a FEATURES 18 MSPS Correlated Double Sampler (CDS) 6 dB to 40 dB 10-Bit Variable Gain Amplifier (VGA) Low Noise Clamp Ci...
Datasheet PDF File AD9804 PDF File

AD9804
AD9804


Overview
a FEATURES 18 MSPS Correlated Double Sampler (CDS) 6 dB to 40 dB 10-Bit Variable Gain Amplifier (VGA) Low Noise Clamp Circuits Preblanking Function 10-Bit 18 MSPS A/D Converter 3-Wire Serial Digital Interface 3 V Single Supply Operation Low Power CMOS 48-Lead LQFP Package APPLICATIONS PC Cameras Digital Still Cameras Complete 10-Bit 18 MSPS CCD Signal Processor AD9804 FUNCTIONAL BLOCK DIAGRAM PBLK AVDD AVSS CLPOB DRVDD CLP 6dB TO 40dB CDS VGA 10-BIT ADC 10 DOUT DRVSS CCDIN CLP BANDGAP REFERENCE CLPDM 10 INTERNAL BIAS VR T VRB VGA GAIN REGISTER CML DVDD AD9804 DIGITAL INTERFACE INTERNAL TIMING DVSS PRODUCT DESCRIPTION The AD9804 is a complete analog signal processor for CCD applications.
It features an 18 MHz single-channel architecture designed to sample and condition the outputs of interlaced and progressive scan area CCD arrays.
The AD9804’s signal chain consists of an input clamp, correlated double sampler (CDS), digitally controlled VGA, black level clamp, and a 10-bit A/D converter.
The internal VGA gain register is programmed through a 3-wire serial digital interface.
SL SCK SDATA SHP SHD DATACLK www.
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0 Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use.
No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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, 2000 ANALOG SPECIFICATIONS (T Parameter TEMPERATURE RANGE Operating Storage POWER SUPPLY VOLTAGE Analog, Digital, Digital Driver POWER CONSUMPTION MAXIMUM CLOCK RATE AD9804–SPECIFICATIONS MIN to TMAX, AVDD = DVDD = 3.
0 V, fDATACLK = fSHP = fSHD = 18 MHz, unless otherwise noted.
) Min –20 –65 2.
8 3.
0 85 18 500 1.
0 100 1024 4 38 6 40 32 10...


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