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CY7C1378B

Cypress Semiconductor
Part Number CY7C1378B
Manufacturer Cypress Semiconductor
Description 9-Mbit (256K x 32) Pipelined SRAM
Published Jan 25, 2010
Detailed Description CY7C1378B 9-Mbit (256K x 32) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivale...
Datasheet PDF File CY7C1378B PDF File

CY7C1378B
CY7C1378B

Overview
CY7C1378B 9-Mbit (256K x 32) Pipelined SRAM with NoBL™ Architecture Features • Pin compatible and functionally equivalent to ZBT devices • Internally self-timed output buffer control to eliminate the need to use OE • Byte Write capability • 256K x 32 common I/O architecture • Single 3.
3V power supply • Fast clock-to-output times — 3.
2 ns (for 200-MHz device) — 3.
5 ns (for 166-MHz device) • Clock Enable (CEN) pin to suspend operation • Synchronous self-timed writes • Asynchronous Output Enable (OE) • JEDEC-standard 100-pin TQFP package • Burst Capability—linear or interleaved burst order • “ZZ” Sleep mode option • Available in 100-pin TQFP package Functional Description[1] The CY7C1378B is a 3.
3V, 256K x 32 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states.
The CY7C1378B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to enable consecutive Read/Write operations ...


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