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CY7C1461AV25

Part Number	CY7C1461AV25
Manufacturer	Cypress Semiconductor
Description	Flow-Through SRAM
Published	Mar 13, 2010
Detailed Description	CY7C1461AV25 CY7C1463AV25 www.DataSheet4U.com CY7C1465AV25 36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM with N...
Datasheet	CY7C1461AV25 PDF File

Overview

CY7C1461AV25 CY7C1463AV25 www.
DataSheet4U.
com CY7C1465AV25 36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM with NoBL™ Architecture Features • No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles • Can support up to 133-MHz bus operations with zero wait states — Data is transferred on every clock • Pin-compatible and functionally equivalent to ZBT™ devices • Internally self-timed output buffer control to eliminate the need to use OE • Registered inputs for flow-through operation • Byte Write capability • 2.
5V/1.
8V I/O power supply • Fast clock-to-output times — 6.
5 ns (for 133-MHz device) • Clock Enable (CEN) pin to enable clock and suspend operatio...

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