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CY7C1463AV33

Cypress Semiconductor
Part Number CY7C1463AV33
Manufacturer Cypress Semiconductor
Description Flow-Through SRAM
Published Mar 13, 2010
Detailed Description CY7C1461AV33 www.DataSheet4U.com CY7C1463AV33, CY7C1465AV33 36 Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with...
Datasheet PDF File CY7C1463AV33 PDF File

CY7C1463AV33
CY7C1463AV33

Overview
CY7C1461AV33 www.
DataSheet4U.
com CY7C1463AV33, CY7C1465AV33 36 Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL™ Architecture Features ■ ■ Functional Description The CY7C1461AV33/CY7C1463AV33/CY7C1465AV33[1] are 3.
3V, 1M x 36/2M x 18/512K x 72 Synchronous Flow-Through Burst SRAMs designed specifically to support unlimited true back-to-back read and write operations without the insertion of wait states.
The CY7C1461AV33/CY7C1463AV33/CY7C1465AV33 is equipped with the advanced NoBL logic required to enable consecutive read and write operations with data being transferred on every clock cycle.
This feature dramatically improves the throughput of data through the SRAM, especially in systems that require frequent write-read transitions.
All synchronous inputs pass through input registers controlled by the rising edge of the clock.
The clock input is qualified by the Clock Enable (CEN) signal, which when deasserted suspends operation and extends the previous clock cycle.
Maximu...


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