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HYMD232G726AK8-H

Hynix Semiconductor
Part Number HYMD232G726AK8-H
Manufacturer Hynix Semiconductor
Description Registered DDR SDRAM DIMM
Published Mar 16, 2010
Detailed Description www.DataSheet4U.com 32Mx72 bits Registered DDR SDRAM DIMM HYMD232G726A(L)8-M/K/H/L DESCRIPTION Hynix HYMD232G726A(L)8...
Datasheet PDF File HYMD232G726AK8-H PDF File

HYMD232G726AK8-H
HYMD232G726AK8-H



Overview
www.
DataSheet4U.
com 32Mx72 bits Registered DDR SDRAM DIMM HYMD232G726A(L)8-M/K/H/L DESCRIPTION Hynix HYMD232G726A(L)8-M/K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules(DIMMs) which are organized as 32Mx72 high-speed memory arrays.
Hynix HYMD232G726A(L)8-M/ K/H/L series consists of nine 32Mx8 DDR SDRAM in 400mil TSOPII packages on a 184pin glass-epoxy substrate.
Hynix HYMD232G726A(L)8-M/K/H/L series provide a high performance 8-byte interface in 5.
25" width form factor of industry stanard.
It is suitable for easy interchange and addition.
Hynix HYMD232G726A(L)8-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs.
While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it.
The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth.
All input and output voltage levels are compatible with SSTL_2.
High speed frequencies, programmable latencies and burst lengths allow variety of device operation in high performance memory system.
Hynix HYMD232G726A(L)8-M/K/H/L series incorporates SPD(serial presence detect).
Serial presence detect function is implemented via a serial 2,048-bit EEPROM.
The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
FEATURES • • • • • • • 256MB (32M x 72) Registered DDR DIMM based on 32Mx8 DDR SDRAM JEDEC Standard 184-pin dual in-line memory module (DIMM) Error Check Correction (ECC) Capability Registered inputs with one-clock delay Phase-lock loop (PLL) clock driver to reduce loading 2.
5V +/- 0.
2V VDD and VDDQ Power supply All inputs and outputs are compatible with SSTL_2 interface • • • • • • • Fully...



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