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HYMD512G726BLF8N-D43

Part Number	HYMD512G726BLF8N-D43
Manufacturer	Hynix Semiconductor
Description	Registered DDR SDRAM DIMM
Published	Mar 16, 2010
Detailed Description	128Mx72 bits Registered DDR SDRAM DIMM HYMD512G726B(L)F8N-D43/J DESCRIPTION www.DataSheet4U.com Preliminary Hynix 64M...
Datasheet	HYMD512G726BLF8N-D43 PDF File

Overview

128Mx72 bits Registered DDR SDRAM DIMM HYMD512G726B(L)F8N-D43/J DESCRIPTION www.
DataSheet4U.
com Preliminary Hynix 64M x 8 series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 128M x 72 high-speed memory arrays.
Hynix HYMD512G726B(L)F8N-D43/J series consists of eighteen 64M x 8 DDR SDRAM in FBGA packages on a 184pin glass-epoxy substrate.
Hynix HYMD512G726B(L)F8N-D43/J series provide a high performance 8-byte interface in 5.
25" width form factor of industry standard.
It is suitable for easy interchange and addition.
Hynix HYMD512G726B(L)F8N-D43/J series is designed for high speed of up to 200MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs.
While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it.
The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth.
All input and output voltage levels are compatible with SSTL_2.
High speed frequencies, programmable latencies and burst lengths allow variety of device operation in high performance memory system.
Hynix HYMD512G726B(L)F8N-D43/J series incorporates SPD(serial presence detect).
Serial presence detect function is implemented via a serial 2,048-bit EEPROM.
The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
FEATURES • • • • • • 1GB (128M x 72) Registered DDR DIMM based on 64MX8 DDR SDRAM JEDEC Standard 184-pin dual in-line memory module (DIMM) Error Check Correction (ECC) Capability Registered inputs with one-clock delay Phase-lock loop (PLL) clock driver to reduce loading 2.
6V +/- 0.
1V VDD and VDDQ Power supply for DDR400, 2.
5V +/- 0.
2V VDD and VDDQ for DDR333 supported All inputs and outputs ar...

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HYMD512G726BLF8N-D43 Registered DDR SDRAM DIMM - Hynix Semiconductor

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