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HYS72T512022EP-3.7-B

Qimonda
Part Number HYS72T512022EP-3.7-B
Manufacturer Qimonda
Description 240-Pin Dual Die Registered DDR2 SDRAM Modules
Published Apr 15, 2010
Detailed Description March 2007 www.DataSheet4U.com HYS72T512022EP–3.7–B HYS72T512022EP–3S–B 240-Pin Dual Die Registered DDR2 SDRAM Modules...
Datasheet PDF File HYS72T512022EP-3.7-B PDF File

HYS72T512022EP-3.7-B
HYS72T512022EP-3.7-B

Overview
March 2007 www.
DataSheet4U.
com HYS72T512022EP–3.
7–B HYS72T512022EP–3S–B 240-Pin Dual Die Registered DDR2 SDRAM Modules RDIMM SDRAM RoHS Compliant Internet Data Sheet Rev.
1.
0 Internet Data Sheet www.
DataSheet4U.
com HYS72T[512/1G]0x2EP–[3S/3.
7]–B Registerd DDR2 SDRAM Module HYS72T512022EP–3.
7–B, HYS72T512022EP–3S–B Revision History: 2007-03, Rev.
1.
0 Page All All Subjects (major changes since last revision) Adapted internet edition Final Document We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to: techdoc@qimonda.
com qag_techdoc_rev400 / 3.
2 QAG / 2006-08-07 03292007-RHOW-C5L6 2 Internet Data Sheet www.
DataSheet4U.
com HYS72T[512/1G]0x2EP–[3S/3.
7]–B Registerd DDR2 SDRAM Module 1 Overview This chapter gives an overview of the 1.
8 V 240-Pin Dual Die Registered DDR2 SDRAM Modules with parity bit product family and describes its main characteristics.
1.
1 Features • • • • • • • • • • Programmable self refresh rate via EMRS2 setting Programmable partial array refresh via EMRS2 settings DCC enabling via EMRS2 setting All inputs and outputs SSTL_18 compatible Off-Chip Driver Impedance Adjustment (OCD) and On-Die Termination (ODT) Serial Presence Detect with E2PROM RDIMM Dimensions (nominal): 30 mm high, 133.
35 mm wide Based on standard reference card layouts Raw Card “K” All speed grades faster than DDR2–400 comply with DDR2–400 timing specifications.
RoHS compliant products1) • 240-Pin PC2–5300 and PC2–4200 DDR2 SDRAM memory modules.
• 512M ×72 module organization and 2 × 256M × 4 chip organization • Registered DIMM Parity bit for address and control bus • 4GB modules built with 1Gbit DDR2 SDRAMs in P-TFBGA-71 chipsize packages.
• Standard Double-Data-Rate-Two Synchronous DRAMs (DDR2 SDRAM) with a single + 1.
8 V (± 0.
1 V) power supply • Programmab...


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