DatasheetsPDF.com

M95512-W

STMicroelectronics
Part Number M95512-W
Manufacturer STMicroelectronics
Description 512-Kbit Serial SPI bus EEPROM
Published Apr 16, 2010
Detailed Description M95512-W M95512-R M95512-DF Datasheet 512-Kbit serial SPI bus EEPROM SO8N (150 mil width) TSSOP8 (169 mil width) UFDFPN...
Datasheet PDF File M95512-W PDF File

M95512-W
M95512-W

Overview
M95512-W M95512-R M95512-DF Datasheet 512-Kbit serial SPI bus EEPROM SO8N (150 mil width) TSSOP8 (169 mil width) UFDFPN8 (DFN8) (2 x 3 mm) WLSCP8 (1.
289 x 1.
955 mm) Product status link M95512-DF M95512-R M95512-W Features • Compatible with the serial peripheral interface (SPI) bus • Memory array – 512-Kbit (64-Kbyte) of EEPROM – Page size: 128 bytes – Additional write lockable page (Identification page) • Write time – Byte Write within 5 ms – Page Write within 5 ms • Write protect – quarter array – half array – whole memory array • High-speed clock: 16 MHz • Single supply voltage: – 2.
5 V to 5.
5 V for M95512-W – 1.
8 V to 5.
5 V for M95512-R – 1.
7 V to 5.
5 V for M95512-DF • Operating temperature range: from -40 °C up to +85 °C • Enhanced ESD protection • More than 4 million Write cycles • More than 200-year data retention • Packages – SO8N (ECOPACK2) – TSSOP8 (ECOPACK2) – UFDFPN8 (ECOPACK2) – WLCSP8 (ECOPACK2) DS4192 - Rev 24 - September 2021 For further information contact your local STMicroelectronics sales office.
www.
st.
com M95512-W M95512-R M95512-DF Description 1 Description The M95512 devices are electrically erasable programmable memories (EEPROMs) organized as 65536 x 8 bits, accessed through the SPI bus.
The M95512-W can operate with a supply voltage from 2.
5 V to 5.
5 V, the M95512-R can operate with a supply voltage from 1.
8 V to 5.
5 V and the M95512-DF can operate with a supply voltage from 1.
7 V to 5.
5 V, over an ambient temperature range of -40 °C / +85 °C.
The M95512-DF offers an additional page, named the Identification page (128 bytes).
The Identification page can be used to store sensitive application parameters that can be (later) permanently locked in read-only mode.
Figure 1.
Logic diagram VCC D C S M95xxx Q W HOLD VSS The SPI bus signals are C, D and Q, as shown in Figure 1 and Table 1.
The device is selected when Chip select (S) is driven low.
Communications with the device can be interrupted when the HOLD is driven low.
C D Q ...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)