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K6F4016R4E

Samsung semiconductor
Part Number K6F4016R4E
Manufacturer Samsung semiconductor
Description 256K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM
Published Apr 23, 2010
Detailed Description K6F4016R4E Family Document Title CMOS SRAM www.DataSheet4U.com 256K x16 bit Super Low Power and Low Voltage Full CMOS ...
Datasheet PDF File K6F4016R4E PDF File

K6F4016R4E
K6F4016R4E


Overview
K6F4016R4E Family Document Title CMOS SRAM www.
DataSheet4U.
com 256K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM Revision History Revision No.
History 0.
0 1.
0 Initial draft Finalize Draft Date November 10, 2000 March 12, 2001 Remark Preliminary Final The attached datasheets are provided by SAMSUNG Electronics.
SAMSUNG Electronics CO.
, LTD.
reserve the right to change the specifications and products.
SAMSUNG Electronics will answer to your questions about device.
If you have any questions, please contact the SAMSUNG branch offices.
-1- Revision 1.
0 March 2001 K6F4016R4E Family FEATURES • • • • • • CMOS SRAM www.
DataSheet4U.
com GENERAL DESCRIPTION The K6F4016R4E families are fabricated by SAMSUNG′s advanced full CMOS process technology.
The families support industrial temperature range and 48 ball Chip Scale Package for user flexibility of system design.
The families also support low data retention voltage for battery back-up operation with low data retention current.
256K x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM Process Technology: Full CMOS Organization: 256K x16 bit Power Supply Voltage: 1.
65~2.
20V Low Data Retention Voltage: 1.
0V(Min) Three State Outputs Package Type: 48-TBGA-6.
00x7.
00 PRODUCT FAMILY Power Dissipation Product Family Operating Temperature Vcc Range Speed Standby (ISB1, Typ.
) 0.
5µ A2) Operating (ICC1, Max) 2mA PKG Type K6F4016R4E-F Industrial(-40~85 °C) 1.
65~2.
2V 701)/85ns 48-TBGA-6.
00x7.
00 1.
The parameter is measured with 30pF test load.
2.
Typical value are measured at VCC=2.
0V, TA=25 °C and not 100% tested.
PIN DESCRIPTION 1 2 3 4 5 6 FUNCTIONAL BLOCK DIAGRAM Clk gen.
Precharge circuit.
A LB OE A0 A1 A2 DNU Vcc Vss B I/O9 UB A3 A4 CS I/O1 Row Addresses C I/O10 I/O11 A5 A6 I/O2 I/O3 Row select Memory Cell Array D Vss I/O12 A17 A7 I/O4 Vcc E Vcc I/O13 DNU A16 I/O5 Vss I/O1~I/O8 Data cont Data cont Data cont I/O Circuit Column select F I/O15 I/O14 ...



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