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KS8893ML Datasheet PDF

Micrel Semiconductor
Part Number KS8893ML
Manufacturer Micrel Semiconductor
Title Integrated 3-Port 10/100 Managed Switch
Description The KS8893M, a highly integrated layer 2 managed switch, is designed for low port count, cost-sensitive 10/100 Mbps switch systems. It offers an e...
Features of the KS8893M. ___________________________________________________________________________________________________ Functional Diagram 1K LOOK-UP ENGINE FIFO, FLOW CONTROL, VLAN TAGGING, PRIORITY HP AUTO MDIX 10/100 T/TX/FX PHY 1 10/100 T/TX PHY 2 10/100 MAC 1 QUEUE MANAGEMENT HP AUTO MDIX ...

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Datasheet PDF File KS8893ML PDF File


KS8893ML KS8893ML KS8893ML




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KS8893M : The KS8893M, a highly integrated layer 2 managed switch, is designed for low port count, cost-sensitive 10/100 Mbps switch systems. It offers an extensive feature set that includes rate limiting, tag/port-based VLAN, QoS priority, management, management information base (MIB) counters, MII/SNI, and CPU control/data interfaces to effectively address both current and emerging Fast Ethernet applications. The KS8893M contains two 10/100 transceivers with patented mixed-signal low-power technology, three media access control (MAC) units, a high-speed non-blocking switch fabric, a dedicated address lookup engine, and an on-chip frame buffer memory. Both PHY units support 10BASE-T and 100BASETX. I.

KS8893MI : The KS8893M, a highly integrated layer 2 managed switch, is designed for low port count, cost-sensitive 10/100 Mbps switch systems. It offers an extensive feature set that includes rate limiting, tag/port-based VLAN, QoS priority, management, management information base (MIB) counters, MII/SNI, and CPU control/data interfaces to effectively address both current and emerging Fast Ethernet applications. The KS8893M contains two 10/100 transceivers with patented mixed-signal low-power technology, three media access control (MAC) units, a high-speed non-blocking switch fabric, a dedicated address lookup engine, and an on-chip frame buffer memory. Both PHY units support 10BASE-T and 100BASETX. I.




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