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XCV200

Part Number	XCV200
Manufacturer	Xilinx
Description	Virtex Field Programmable Gate Array
Published	May 1, 2010
Detailed Description	0 R Virtex™ 2.5 V www.DataSheet4U.com Field Programmable Gate Arrays 0 0 DS003-1 (v2.5 ) April 2, 2001 Product Speci...
Datasheet	XCV200 PDF File

Overview

0 R Virtex™ 2.
5 V www.
DataSheet4U.
com Field Programmable Gate Arrays 0 0 DS003-1 (v2.
5 ) April 2, 2001 Product Specification Features • Fast, high-density Field-Programmable Gate Arrays - Densities from 50k to 1M system gates - System performance up to 200 MHz - 66-MHz PCI Compliant - Hot-swappable for Compact PCI Multi-standard SelectIO™ interfaces - 16 high-performance interface standards - Connects directly to ZBTRAM devices Built-in clock-management circuitry - Four dedicated delay-locked loops (DLLs) for advanced clock control - Four primary low-skew global clock distribution nets, plus 24 secondary local clock nets Hierarchical memory system - LUTs configurable as 16-bit RAM, 32-bit RAM, 16-bit dual-ported RAM, or 16-bit Shift Register - Configurable synchronous dual-ported 4k-bit RAMs - Fast interfaces to external high-performance RAMs Flexible architecture that balances speed and density - Dedicated carry logic for high-speed arithmetic - Dedicated multiplier support - Cascade chain for wide-input functions - Abundant registers/latches with clock enable, and dual synchronous/asynchronous set and reset - Internal 3-state bussing - IEEE 1149.
1 boundary-scan logic - Die-temperature sensor diode • Supported by FPGA Foundation™ and Alliance Development Systems - Complete support for Unified Libraries, Relationally Placed Macros, and Design Manager - Wide selection of PC and workstation platforms SRAM-based in-system configuration - Unlimited re-programmability - Four programming modes 0.
22 µm 5-layer metal process 100% factory tested • • • • • Description The Virtex FPGA family delivers high-performance, high-capacity programmable logic solutions.
Dramatic increases in silicon efficiency result from optimizing the new architecture for place-and-route efficiency and exploiting an aggressive 5-layer-metal 0.
22 µm CMOS process.
These advances make Virtex FPGAs powerful and flexible alternatives to mask-programmed gate arrays.
The Virtex family comprises th...

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