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ICS8543

Part Number	ICS8543
Manufacturer	Integrated Circuit Systems
Description	1-TO-4 LVDS FANOUT BUFFER
Published	May 13, 2010
Detailed Description	PRELIMINARY Integrated Circuit Systems, Inc. ICS8543 LOW SKEW, 1-TO-4 LVDS FANOUT BUFFER FEATURES • 4 LVDS outputs • De...
Datasheet	ICS8543 PDF File

Overview

PRELIMINARY Integrated Circuit Systems, Inc.
ICS8543 LOW SKEW, 1-TO-4 LVDS FANOUT BUFFER FEATURES • 4 LVDS outputs • Designed to meet or exceed the requirements of ANSI TIA/EIA-644 • Selectable differential HSTL or LVPECL clock inputs • LVCMOS / LVTTL control inputs • 3.
3V operating supply • 20 lead TSSOP • 0°C to 70°C ambient operating temperature GENERAL DESCRIPTION The ICS8543 is a low skew, high performance 1-to-4 clock fanout buffer and a member of HiPerClockS™ the HiPerClockS™ family of High Performance Clock Solutions from ICS.
Utilizing Low Voltage Differential Signaling (LVDS) the ICS8543 provides a low power, low noise, solution for distributing clock signals over controlled impedances of 100Ω.
The ICS8543 accepts any differential input level and translates it to 3.
3V LVDS output levels.
,&6 Guaranteed output and part-to-part skew characteristics www.
DataSheet4U.
com make the ICS8543 ideal for those applications demanding well defined performance and repeatability.
BLOCK DIAGRAM CLK_EN nD Q LE HCLK nHCLK PCLK nPCLK 0 1 Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 PIN ASSIGNMENT VEE CLK_EN CLK_SEL HCLK nHCLK PCLK nPCLK OE VEE VDD 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 Q0 nQ0 VDD Q1 nQ1 Q2 nQ2 VEE Q3 nQ3 CLK_SEL ICS8543 20-Lead TSSOP G Package Top View OE The Preliminary Information presented herein represents a product in prototyping or pre-production.
The noted characteristics are based on initial product characterization.
Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
ICS8543BG www.
icst.
com/products/hiperclocks.
html REV.
C MAY 21, 2001 1 PRELIMINARY Integrated Circuit Systems, Inc.
ICS8543 LOW SKEW, 1-TO-4 LVDS FANOUT BUFFER Type Power Input Pullup Description Power supply ground.
Connect to ground.
Synchronous clock enable.
When HIGH clock outputs follows clock input.
When LOW, Q outputs are force low, nQ outputs are force high.
LVCMOS / LVTTL interface levels.
Clock selec...

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