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ICS86953I-147

Integrated Circuit Systems
Part Number ICS86953I-147
Manufacturer Integrated Circuit Systems
Description 1-TO-9 DIFFERENTIAL-TO-LVCMOS / LVTTL ZERO DELAY BUFFER
Published May 13, 2010
Detailed Description Integrated Circuit Systems, Inc. ICS86953I-147 LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVCMOS / LVTTL ZERO DELAY BUFFER FEATUR...
Datasheet PDF File ICS86953I-147 PDF File

ICS86953I-147
ICS86953I-147


Overview
Integrated Circuit Systems, Inc.
ICS86953I-147 LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVCMOS / LVTTL ZERO DELAY BUFFER FEATURES • 9 single ended LVCMOS/LVTTL outputs; (8) clocks, (1) feedback • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • Maximum output frequency: PLL Mode, 175MHz • VCO range: 250MHz to 700MHz • Output skew: 75ps (maximum) • Cycle-to-cycle jitter: 50ps (maximum) • Static phase offset: 90ps ± 110ps • 3.
3V supply voltage GENERAL DESCRIPTION The ICS86953I-147 is a low voltage, low skew 1-to-9 Differential-to-LVCMOS/LVTTL Clock HiPerClockS™ Generator and a member of the HiPerClock S ™ family of High Performance Clock Solutions from ICS.
The PCLK, nPCLK pair can accept most standard differential input levels.
With output frequencies up to 175MHz, the ICS86953I-147 is targeted for high performance clock applications.
Along with a fully integrated PLL, the ICS86953I-147 contains frequency configurable outputs and an external feedback input for regenerating clocks with “zero delay”.
ICS www.
DataSheet4U.
com PIN ASSIGNMENT VCO_SEL nBYPASS PLL_SEL GND GND VDDO QFB Q0 • -40°C to 85°C ambient operating temperature • Pin compatible to the MPC953 32 31 30 29 28 27 26 25 VDDA FB_CLK nc nc nc nc GND PCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 nPCLK MR/nOE VDDO Q7 GND Q6 VDDO Q5 24 23 22 Q1 VDDO Q2 GND Q3 VDDO Q4 GND ICS86953I-147 21 20 19 18 17 32-Lead LQFP 7mm x 7mm x 1.
4mm package body Y package Top View BLOCK DIAGRAM PCLK nPCLK FB_CLK VCO_SEL nBYPASS MR/nOE PLL_SEL 0 Phase Detector 0 LPF VCO 1 ÷2 1 ÷4 0 1 7 QFB / Q0:Q6 Q7 86953BYI-147 www.
icst.
com/products/hiperclocks.
html 1 REV.
B APRIL 23, 2004 Integrated Circuit Systems, Inc.
ICS86953I-147 LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-LVCMOS / LVTTL ZERO DELAY BUFFER Type Power Input Unused Power Input Pullup Pullup Description Analog supply pin.
Feedback clock input.
LVCMOS / LVTTL interface levels.
No connect.
Power supply ground.
Non-inver ting LVPECL different...



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