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ICS87158

Integrated Circuit Systems
Part Number ICS87158
Manufacturer Integrated Circuit Systems
Description LVPECL-TO-HCSL/LVCMOS
Published Jun 9, 2010
Detailed Description Integrated Circuit Systems, Inc. ICS87158 www.DataSheet4U.com 1-TO-6, LVPECL-TO-HCSL/LVCMOS ÷1, ÷2, ÷4 CLOCK GENERATOR ...
Datasheet PDF File ICS87158 PDF File

ICS87158
ICS87158



Overview
Integrated Circuit Systems, Inc.
ICS87158 www.
DataSheet4U.
com 1-TO-6, LVPECL-TO-HCSL/LVCMOS ÷1, ÷2, ÷4 CLOCK GENERATOR GENERAL DESCRIPTION The ICS87158 is a high performance 1-to-6 LVPECL-to-HCSL/LVCMOS Clock Generator HiPerClockS™ and is a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.
The ICS87158 has one differential input (which can accept LVDS, LVPECL, LVHSTL, SSTL, HCSL), six differential HCSL output pairs and two complementary LVCMOS/LVTTL outputs.
The six HCSL output pairs can be individually configured for divide-by-1, 2, and 4 or high impedance by use of select pins.
The two complementary LVCMOS/LVTTL outputs can be configured for divide by 2, divide by 4, high impedance, or driven low for low power operation.
FEATURES • Six HCSL outputs • Two LVCMOS/LVTTL outputs • One Differential LVPECL clock input pair • PCLK, nPCLK supports the following input types: LVDS, LVPECL, LVHSTL, SSTL, HCSL • Maximum output frequency: 600MHz (maximum) • Output skew: 100ps (maximum) • Propagation delay: 4ns (maximum) • 3.
3V operating supply • 0°C to 85°C ambient operating temperature • Available in both standard and lead-free RoHS compliant packages • Industrial temperature information available upon request IC S The primary use of the ICS87158 is in Intel ® E8870 chipsets that use Intel ® Pentium 4 processors.
The ICS87158 converts the differential clock from the main system clock into HCSL clocks used by Intel ® Pentium 4 processors.
However, the ICS87158 is a highly flexible, general purpose device that operates up to 600MHz and can be used in any situation where Differential-to-HCSL translation is required.
BLOCK DIAGRAM MULT_0 MULT_1 IREF ▲ PIN ASSIGNMENT GND VDD VDD _R PCLK nPCLK GND_R VDD _M MREF nMREF GND_M VDD GND VDD _L VDD GND_L SEL_T MULT_0 MULT_1 VDD _L GND_L SEL_A SEL_B SEL_U PWR_DWN# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VDD GN...



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