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ADC0801S040

NXP Semiconductors
Part Number ADC0801S040
Manufacturer NXP Semiconductors
Description 8-bit universal analog-to-digital converter
Published Jun 9, 2010
Detailed Description ADC0801S040 Single 8 bits ADC, up to 40 MHz Rev. 03 — 2 July 2012 Product data sheet 1. General description The ADC080...
Datasheet PDF File ADC0801S040 PDF File

ADC0801S040
ADC0801S040

Overview
ADC0801S040 Single 8 bits ADC, up to 40 MHz Rev.
03 — 2 July 2012 Product data sheet 1.
General description The ADC0801S040 is an 8-bit universal analog-to-digital converter (ADC) for video and general purpose applications.
It converts the analog input signal from 2.
7 V to 5.
5 V into 8-bit binary-coded digital words at a maximum sampling rate of 40 MHz.
All digital inputs and outputs are CMOS/Transistor-Transistor Logic (TTL) compatible.
A sleep mode allows reduction of the device power consumption to 4 mW.
2.
Features  8-bit resolution  Operation between 2.
7 V and 5.
5 V  Sampling rate up to 40 MHz  DC sampling allowed  High signal-to-noise ratio over a large analog input frequency range (7.
3 effective bits at 4.
43 MHz full-scale input at fclk = 40 MHz)  CMOS/TTL compatible digital inputs and outputs  External reference voltage regulator  Power dissipation only 30 mW (typical value)  Low analog input capacitance, no buffer amplifier required  Sleep mode (4 mW)  No sample-and-hold circuit required 3.
Applications  Video data digitizing  Camera  Camcorder  Radio communication  Car alarm system ® Integrated Device Technology ADC0801S040 Single 8 bits ADC, up to 40 MHz 4.
Quick reference data Table 1.
Quick reference data VDDA = V5 to V6 = 3.
3 V; VDDD = V3 to V4 = 3.
3 V; VDDO = V20 to V11 = 3.
3 V; VSSA, VSSD and VSSO shorted together; Vi(a)(p-p) = 1.
84 V; CL = 20 pF; Tamb = 0 C to 70 C; typical values measured at Tamb = 25 C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit VDDA analog supply voltage 2.
7 3.
3 5.
5 V VDDD digital supply voltage 2.
7 3.
3 5.
5 V VDDO output supply voltage 2.
5 3.
3 5.
5 V VDD IDDA supply voltage difference analog supply current VDDA  VDDD VDDD  VDDO 0.
2 - 0.
2 - - 4 +0.
2 V +2.
25 V 6 mA IDDD digital supply current - 5 8 mA IDDO INL output supply current integral non-linearity fclk = 40 MHz; ramp input; CL = 20 pF ramp input; see Figure 6 - 1 2 mA - ...


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