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K4Y54044UF

Samsung Semiconductor
Part Number K4Y54044UF
Manufacturer Samsung Semiconductor
Description XDR/RDRAM
Published Jun 15, 2010
Detailed Description www.DataSheet4U.com K4Y5416(/08/04)4UF XDR DRAM 256Mbit XDR DRAM(F-die) 2M x 16(/8/4) bit x 8s Banks Version 1.0 Jan...
Datasheet PDF File K4Y54044UF PDF File

K4Y54044UF
K4Y54044UF

Overview
www.
DataSheet4U.
com K4Y5416(/08/04)4UF XDR DRAM 256Mbit XDR DRAM(F-die) 2M x 16(/8/4) bit x 8s Banks Version 1.
0 Jan.
2005 Version 1.
0 Jan.
2005 Page -1 www.
DataSheet4U.
com K4Y5416(/08/04)4UF Change History Version 0.
1( July 2004) - Preliminary - First Copy - Based on the Rambus XDR DRAMTM Datasheet Version 0.
81 XDR DRAM Version 1.
0( Jan.
2005) - Delete “Preliminary” - Based on the Rambus XDR DRAMTM Datasheet Version 0.
85 Version 1.
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2005 Page 0 www.
DataSheet4U.
com K4Y5416(/08/04)4UF Overview XDR DRAM The Rambus XDR DRAM device is a general-purpose high-performance memory device suitable for use in a broad range of applications, including computer memory, graphics, video, and any other application where high bandwidth and low latency are required.
The 256Mb XDR DRAM device is a CMOS DRAM organized as 16M words by 16bits.
The use of Differential Rambus Signaling Level(DRSL) technology permits 4000/3200/2400 Mb/s transfer rates while using conventional system and board design technologies.
XDR DRAM devices are capable of sustained data transfers up to 8000 MB/s.
XDR DRAM device architecture allows the highest sustained bandwidth for multiple, interleaved randomly addressed memory transactions.
The highly-efficient protocol yields over 95% utilization while allowing fine access granuarity.
The device’s eight banks support up to four interleaved transactions.
Features ♦ Highest pin bandwidth available - 4000/3200/2400 Mb/s Octal Data Rate(ODR) Signaling ♦ Bi-directional differential RSL(DRSL) - Flexible read/write bandwidth allocation - Minimum pin count ♦ Programmable on-chip termination - Adaptive impedance matching - Reduced system cost and routing complexity ♦ Highest sustained bandwidth per DRAM device - Up to 8000 MB/s sustained data rate - Eight banks : bank-interleaved transaction at full bandwidth - Dynamic request scheduling - Early-read-after-write support for maximum efficiency - Zero overhead refresh ♦ Low Latency - 2.
0/2.
5/3.
33ns reques...


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