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MC9S08MM128

Motorola Semiconductor Products
Part Number MC9S08MM128
Manufacturer Motorola Semiconductor Products
Description 8-Bit HCS08 CPU
Published Jun 29, 2010
Detailed Description Freescale Semiconductor Data Sheet: Advanced Information An Energy-Efficient Solution from Freescale Document Number: M...
Datasheet PDF File MC9S08MM128 PDF File

MC9S08MM128
MC9S08MM128

Overview
Freescale Semiconductor Data Sheet: Advanced Information An Energy-Efficient Solution from Freescale Document Number: MC9S08MM128 Rev.
2, 04/2010 www.
DataSheet4U.
com Covers: MC9S08MM128, and MC9S08MM64, MC9S08MM32, and MC9S08MM32A 8-Bit HCS08 Central Processor Unit (CPU) – – – – – – Up to 48-MHz CPU above 2.
4 V, 40 MHz CPU above 2.
1 V, and 20 MHz CPU above 1.
8 V across temperature of -40°C to 105°C HCS08 instruction set with added BGND instruction Support for up to 32 interrupt/reset sources 128 K Dual Array Flash read/program/erase over full operating voltage and temperature 12 KB Random-access memory (RAM) Security circuitry to prevent unauthorized access to RAM and Flash Two ultra-low power stop modes.
Peripheral clock enable register can disable clocks to unused modules to reduce currents Time of Day (TOD) — Ultra-low power 1/4 sec counter with up to 64s timeout.
Ultra-low power external oscillator that can be used in stop modes to provide accurate clock source to the TOD.
6 usec typical wake up time from stop3 mode Oscillator (XOSC1) — Loop-control Pierce oscillator; 32.
768 kHz crystal or ceramic resonator dedicated for TOD operation.
Oscillator (XOSC2) — for high frequency crystal input for MCG reference to be used for system clock and USB operations.
Multipurpose Clock Generator (MCG) — PLL and FLL; precision trimming of internal reference allows 0.
2% resolution and 2% deviation over temperature and voltage; supports CPU frequencies from 4 kHz to 48 MHz.
Watchdog computer operating properly (COP) reset Watchdog computer operating properly (COP) reset with option to run from dedicated 1-kHz internal clock source or bus clock Low-voltage detection with reset or interrupt; selectable trip points; separate low-voltage warning with optional interrupt; selectable trip points Illegal opcode and illegal address detection with reset Flash block protection for each array to prevent accidental write/erasure Hardware CRC to support fast cyclic redundancy checks Single...


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