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25AA02E48

Microchip Technology
Part Number 25AA02E48
Manufacturer Microchip Technology
Description 2K SPI Bus Serial EEPROM
Published Jul 22, 2010
Detailed Description 25AA02E48/25AA02E64 2K SPI Bus Serial EEPROMs with EUI-48™ or EUI-64™ Node Identity Device Selection Table Part Numbe...
Datasheet PDF File 25AA02E48 PDF File

25AA02E48
25AA02E48


Overview
25AA02E48/25AA02E64 2K SPI Bus Serial EEPROMs with EUI-48™ or EUI-64™ Node Identity Device Selection Table Part Number 25AA02E48 25AA02E64 VCC Range 1.
8V-5.
5V 1.
8V-5.
5V Page Size 16 Bytes 16 Bytes Features • Preprogrammed Globally Unique, 48-bit or 64-bit Node Address • Compatible with EUI-48™ and EUI-64™ • 10 MHz Maximum Clock Frequency • Low-Power CMOS Technology: - Maximum Write Current: 5 mA at 5.
5V - Read Current: 5 mA at 5.
5V, 10 MHz - Standby Current: 1 µA at 2.
5V • 256 x 8-bit Organization • Write Page Mode (up to 16 bytes) • Sequential Read • Self-Timed Erase and Write Cycles (5 ms maximum) • Block Write Protection: - Protect none, 1/4, 1/2 or all of array • Built-in Write Protection: - Power-on/off data protection circuitry - Write enable latch - Write-protect pin • High Reliability: - Endurance: 1,000,000 erase/write cycles - Data retention: >200 years - ESD protection: >4000V • Temperature Ranges Supported: - Industrial (I): -40C to +85C • Pb-Free and RoHS Compliant Package Types (not to scale) 6-Lead SOT-23 (OT) SOIC (SN) SCK 1 VSS 2 SI 3 6 VDD 5 CS 4 SO CS 1 SO 2 WP 3 VSS 4 8 VCC 7 HOLD 6 SCK 5 SI Temp.
Ranges I I Packages SN, OT SN, OT Node Address EUI-48™ EUI-64™ Description The Microchip Technology Inc.
25AA02E48/25AA02E64 (25AA02EXX) is a 2 Kbit Serial Electrically Erasable Programmable Read-Only Memory (EEPROM).
The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus.
The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines.
Access to the device is controlled through a Chip Select (CS) input.
Note: 25AA02EXX is used in this document as a generic part number for the 25AA02E48/25AA02E64 devices.
Communication to the device can be paused via the hold pin (HOLD).
While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts.
The 25AA02EXX is a...



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