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LP62S2048M-10LI


Part Number LP62S2048M-10LI
Manufacturer AMIC Technology
Title 256K X 8 BIT LOW VOLTAGE CMOS SRAM
Description The LP62S2048-I is a low operating current 2,097,152-bit static random access memory organized as 262,144 words by 8 bits and operates on a low po...
Features n Power supply range: 2.7V to 3.3V n Access times: 70/100 ns (max.) n Current: Low power version: Operating: 30mA (max.) Standby: 50µA (max.) Very low power version: Operating: 30mA (max.) Standby: 10µA (max.) n Full static operation, no clock or refreshing required n All inputs and outputs are dire...

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LP62S2048M-10LLI : The LP62S2048-I is a low operating current 2,097,152-bit static random access memory organized as 262,144 words by 8 bits and operates on a low power supply range: 2.7V to 3.3V. It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for POWER-DOWN and device enable and an output enable input is included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Pin Configurations n SOP n TSOP/(TSSOP) n CSP (Chip Size Package) 36-pin Top View A17 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 GND 1 2 3 4.

LP62S2048M-10LLT : The LP62S2048-T is a low operating current 2,097,152bit static random access memory organized as 262,144 words by 8 bits and operates on a low power supply range: 2.7V to 3.3V. It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for POWER-DOWN and device enable and an output enable input is included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Pin Configurations n SOP n TSOP/(TSSOP) n CSP (Chip Size Package) 36-pin Top View A17 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 GND 1 2 3 4 .

LP62S2048M-10LT : The LP62S2048-T is a low operating current 2,097,152bit static random access memory organized as 262,144 words by 8 bits and operates on a low power supply range: 2.7V to 3.3V. It is built using AMIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for POWER-DOWN and device enable and an output enable input is included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Pin Configurations n SOP n TSOP/(TSSOP) n CSP (Chip Size Package) 36-pin Top View A17 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 GND 1 2 3 4 .




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