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SCG4500

Connor-Winfield
Part Number SCG4500
Manufacturer Connor-Winfield
Description Synchronous Clock Generators
Published Mar 9, 2011
Detailed Description SCG4500 Series Synchronous Clock Generators PLL 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630-851-4722 Fax:...
Datasheet PDF File SCG4500 PDF File

SCG4500
SCG4500

Overview
SCG4500 Series Synchronous Clock Generators PLL 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630-851-4722 Fax: 630-851-5040 www.
conwin.
com Features • Phase Locked Output Frequency Control • Intrinsically Low Jitter Crystal Oscillator • LVPECL Outputs with Disable Function • Dual Input References • LOR & LOL combined alarm output • Force Free Run Function • Automatic Free Run operation on loss of both References A & B • Input Duty Cycle Tolerant • 3.
3V dc Power Supply Bulletin Page Revision Date Issued By www.
DataSheet4U.
com SG026 1 of 16 P08 08 Oct 02 MBatts • Small Size: 1 Square Inch General Description The SCG4500 Series is a mixed-signal phase locked loop generating LVPECL outputs from an intrinsically low jitter, voltage controlled, crystal oscillator.
The LVPECL outputs may be disabled.
The SCG4500 Series can lock to one of two external references, which is selectable using the SELAB input select pin.
The unit has a fast acquisition time of about 1.
5 seconds and it is tolerant of different reference duty cycles.
The SCG4500 Series includes an alarm output that indicates deviations from normal operation.
If a Lossof-Reference (LOR) or Loss-of-Lock (LOL) is detected the alarm with indicate the need for a reference rearrangement.
If both references A and B are absent the module will enter Free Run operation.
The FRstatus pin will indicate that the module is in Free Run operation.
Frequency stability during Free Run operation is guaranteed to ±20 ppm.
Additionally the Free Run mode may be entered manually.
The package dimensions are 1” x 1.
025” x .
45” on a 6 layer FR4 board with castellated pins.
Parts are assembled using high temperature solder to withstand 63/37 alloys, 180°C surface mount reflow processes.
Maximum Dimension Package Outline Figure 1 Block Diagram Figure 2 10 kΩ FREE RUN STATUS 10 kΩ FORCE FREE RUN 33 Ω ALARM Q 33 Ω REFA REFB 8 KHz PHASE ALIGNER DPFD ANALOG FILTER LOW JITTER VCXO QN SEL AB 10 kΩ 1/N 33 Ω OPTIONAL REFEREN...


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