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AD9739A

Analog Devices
Part Number AD9739A
Manufacturer Analog Devices
Description RF Digital-to-Analog Converters
Published Mar 10, 2011
Detailed Description Data Sheet 11-/14-Bit, 2.5 GSPS, RF Digital-to-Analog Converters AD9737A/AD9739A FEATURES Direct RF synthesis at 2.5 G...
Datasheet PDF File AD9739A PDF File

AD9739A
AD9739A

Overview
Data Sheet 11-/14-Bit, 2.
5 GSPS, RF Digital-to-Analog Converters AD9737A/AD9739A FEATURES Direct RF synthesis at 2.
5 GSPS update rate DC to 1.
25 GHz in baseband mode 1.
25 GHz to 3.
0 GHz in mix-mode Industry leading single/multicarrier IF or RF synthesis Dual-port LVDS data interface Up to 1.
25 GSPS operation Source synchronous DDR clocking Pin compatible with the AD9739 Programmable output current: 8.
7 mA to 31.
7 mA Low power: 1.
1 W at 2.
5 GSPS APPLICATIONS Broadband communications systems DOCSIS CMTS systems Military jammers Instrumentation, automatic test equipment Radar, avionics SDIO SDO CS SCLK FUNCTIONAL BLOCK DIAGRAM RESET IRQ AD9737A/AD9739A 1.
2V SPI DAC BIAS VREF I120 LVDS DDR RECEIVER DB0[13:0] DATA LATCH IOUTN DCI TxDAC CORE IOUTP 4-TO-1 DATA ASSEMBLER DATA CONTROLLER LVDS DDR RECEIVER DB1[13:0] DCO CLK DISTRIBUTION (DIV-BY-4) DLL (MU CONTROLLER) 09616-001 GENERAL DESCRIPTION The AD9737A/AD9739A are 11-bit and 14-bit, 2.
5 GSPS high performance RF DACs that are capable of synthesizing wideband signals from dc up to 3 GHz.
The AD9737A/AD9739A are pin and functionally compatible with the AD9739 with the exception that the AD9737A/AD9739A do not support synchronization or RZ mode, and are specified to operate between 1.
6 GSPS and 2.
5 GSPS.
By elimination of the synchronization circuitry, some nonideal artifacts such as images and discrete clock spurs remain stationary on the AD9737A/AD9739A between power-up cycles, thus allowing for possible system calibration.
AC linearity and noise performance remain the same between the AD9739 and the AD9737A/AD9739A.
The inclusion of on-chip controllers simplifies system integration.
A dual-port, source synchronous, LVDS interface simplifies the digital interface with existing FGPA/ASIC technology.
On-chip controllers are used to manage external and internal clock domain variations over temperature to ensure reliable data transfer from the host to the DAC core.
A serial peripheral interface (S...


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