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CY7C12411KV18

Part Number	CY7C12411KV18
Manufacturer	Cypress Semiconductor
Description	36-Mbit QDR II SRAM 4-Word Burst Architecture
Published	Apr 15, 2011
Detailed Description	36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture ...
Datasheet	CY7C12411KV18 PDF File

Overview

36-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.
0 Cycle Read Latency) 36-Mbit QDR® II+ SRAM 4-Word Burst Architecture (2.
0 Cycle Read Latency) CY7C12411KV18, CY7C12561KV18 CY7C12431KV18, CY7C12451KV18 ® Features ■ Functional Description The CY7C12411KV18, CY7C12561KV18, CY7C12431KV18, and CY7C12451KV18 are 1.
8V Synchronous Pipelined SRAMs, equipped with QDR II+ architecture.
Similar to QDR II architecture, QDR II+ architecture consists of two separate ports: the read port and the write port to access the memory array.
The read port has dedicated data outputs to support read operations and the write port has dedicated data inputs to support write operations.
QDR II+ architecture has sepa...

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CY7C12411KV18 36-Mbit QDR II SRAM 4-Word Burst Architecture - Cypress Semiconductor

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