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CY26112

Part Number	CY26112
Manufacturer	Cypress Semiconductor
Description	One-PLL General Purpose Clock Generator
Published	Apr 15, 2011
Detailed Description	THIS SPEC IS OBSOLETE Spec No: 38-07096 Spec Title: CY26112 One-PLL General Purpose Clock Generator Sunset Owner: IJA...
Datasheet	CY26112 PDF File

Overview

THIS SPEC IS OBSOLETE Spec No: 38-07096 Spec Title: CY26112 One-PLL General Purpose Clock Generator Sunset Owner: IJA Replaced by: N/A www.
DataSheet4U.
com CY26112 One-PLL General Purpose Clock Generator Features • Integrated phase-locked loop • Low skew, low jitter, high accuracy outputs • Frequency Select Pin • 3.
3V Operation with 2.
5 V Output Option • 16-TSSOP Part Number CY26112 Outputs 4 Input Frequency 14.
7456 MHz Benefits Internal PLL with up to 333 MHz internal operation Meets critical timing requirements in complex system designs Dynamic frequency selection Enables application compatibility Industry standard package saves on board space Output Frequency Range 2 x 3.
6864 MHz, 2 x 33/66 MHz (selectable) Logic Block Diagram Pin Configurations 3.
6864 3.
6864 XIN XOUT OSC.
Q Φ VCO P CY26112 16-pin TSSOP XIN VDD AVDD OE AVSS VSSL NC 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 XOUT CLK4 CLK3 VSS N/C VDDL FS LCLK2 PLL OUTPUT MULTIPLEXER AND DIVIDERS FS 33/66 33/66 LCLK1 OE VDDL VSSL VDD AVDD AVSS VSS Output LCLK1 LCLK2 CLK3 CLK4 Pin 8 9 14 15 Default Frequency 3.
6864 3.
6864 33/66 (selectable) 33/66 (selectable) Unit MHz MHz MHz MHz www.
DataSheet4U.
com Cypress Semiconductor Corporation Document #: 38-07096 Rev.
OBS • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised December 02, 2004 CY26112 Summary Name XIN VDD AVDD OE AVSS VSSL NC LCLK1 LCLK2 FS VDDL NC VSS CLK3 CLK4 XOUT[1] Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Description Reference Input Voltage Supply Analog Voltage Supply Output Enable, OE = 0 three-state; OE = 1 active Analog Ground LCLK Ground No Connect - Reserved 3.
6864 MHz Clock output 1 at VDDL level 3.
6864 MHz Clock output 2 at VDDL level Frequency Select Pin Ð FS = 0: 33 MHz, FS = 1: 66 MHz LCLK Voltage Supply (2.
5V or 3.
3V) No Connect - Reserved Ground Clock output 3-33 MHz/66 MHz Clock output 4-33 MHz/66 MHz Reference Output Absolute Maximum Conditions Parameter VDD VDDL TJ Description S...

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