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CY7C1297F

Part Number	CY7C1297F
Manufacturer	Cypress Semiconductor
Description	1-Mbit (64K x 18) Flow-Through Sync SRAM
Published	Apr 27, 2011
Detailed Description	CY7C1297F 1-Mbit (64K x 18) Flow-Through Sync SRAM Features • 64K x 18 common I/O • 3.3V –5% and +10% core power supply...
Datasheet	CY7C1297F PDF File

Overview

CY7C1297F 1-Mbit (64K x 18) Flow-Through Sync SRAM Features • 64K x 18 common I/O • 3.
3V –5% and +10% core power supply (VDD) • 3.
3V I/O supply (VDDQ) • Fast clock-to-output times — 6.
5 ns (133-MHz version) — 7.
5 ns (117-MHz version) • Provide high-performance 2-1-1-1 access rate • User-selectable burst counter supporting Intel Pentium interleaved or linear burst sequences • Separate processor and controller address strobes • Synchronous self-timed write • Asynchronous output enable • Supports 3.
3V I/O level • Offered in JEDEC-standard 100-pin TQFP • “ZZ” Sleep Mode option 6.
5 ns (133-MHz version).
A 2-bit on-chip counter captures the first address in a burst and increments the address automatically for the rest of the burst access.
All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK).
The synchronous inputs include all addresses, all data inputs, address-pipelining Chip Enable (CE1), depth-expansion Chip Enables (CE2 and CE3), Burs...

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