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ADG5204

Analog Devices
Part Number ADG5204
Manufacturer Analog Devices
Description 4-Channel Multiplexer
Published Jul 4, 2011
Detailed Description FEATURES Latch-up proof 3 pF off source capacitance 26 pF off drain capacitance −0.6 pC charge injection Low leakage: 0....
Datasheet PDF File ADG5204 PDF File

ADG5204
ADG5204

Overview
FEATURES Latch-up proof 3 pF off source capacitance 26 pF off drain capacitance −0.
6 pC charge injection Low leakage: 0.
4 nA maximum at 85°C ±9 V to ±22 V dual-supply operation 9 V to 40 V single-supply operation 48 V supply maximum ratings Fully specified at ±15 V, ±20 V, +12 V, and +36 V VSS to VDD analog signal range APPLICATIONS Automatic test equipment Data acquisition Instrumentation Avionics Audio and video switching Communication systems GENERAL DESCRIPTION The ADG5204 is a complementary metal oxide semiconductor (CMOS) analog multiplexer, comprising four single channels.
The ultralow capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-andhold applications, where low glitch and fast settling are required.
Fast switching speed together with high signal bandwidth make the ADG5204 suitable for video signal switching.
The ADG5204 is designed on a trench process, which guards against latch-up.
A dielectric trench separates the P and N channel transistors, thereby preventing latch-up even under severe overvoltage conditions.
The ADG5204 switches one of four inputs to a common output, D, as determined by the 3-bit binary address lines, A0, A1, and EN.
Logic 0 on the EN pin disables the device.
Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies.
In the off condition, signal levels up to the supplies are blocked.
All switches exhibit break-before-make switching action.
High Voltage, Latch-Up Proof, 4-Channel Multiplexer ADG5204 FUNCTIONAL BLOCK DIAGRAM ADG5204 S1 S2 D S3 S4 1 OF 4 DECODERS A0 A1 EN Figure 1.
PRODUCT HIGHLIGHTS 1.
Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel transistors, thereby preventing latch-up even under severe overvoltage conditions.
2.
Ultralow Capacitance and <1 pC Charge Injection.
3.
Dual-Supply Operation.
For applications where the analog signal is bipolar,...


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