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U74HCT595

Unisonic Technologies
Part Number U74HCT595
Manufacturer Unisonic Technologies
Description 8-BIT SHIFT REGISTERS
Published Nov 6, 2012
Detailed Description UNISONIC TECHNOLOGIES CO., LTD U74HCT595 8-BIT SHIFT REGISTERS WITH LATCHED 3-STATE OUTPUT REGISTERS  DESCRIPTION The ...
Datasheet PDF File U74HCT595 PDF File

U74HCT595
U74HCT595

Overview
UNISONIC TECHNOLOGIES CO.
, LTD U74HCT595 8-BIT SHIFT REGISTERS WITH LATCHED 3-STATE OUTPUT REGISTERS  DESCRIPTION The UTC 74HCT595 contains an 8-bit register with asynchronous reset input and an 8-bit latch with output enable input.
Data on the Serial Data Input (SER) will be shift into the internal shift register during every LOW-to-HIGH transition on the Shift Clock.
The latch will latch the 8-bit data from the shift register during the LOW-to-HIGH transition on the Latch Clock.
The shift register also provides a serial output.
 FEATURES * Operation Voltage Range: 4.
5V ~ 5.
5V * High Noise Immunity * Output Compatibility with CMOS and TTL * 8-Bit Serial-In, Parallel-Out Shift * Inputs are TTL voltage compatiable  ORDERING INFORMATION Ordering Number Lead Free Halogen Free U74HCT595L-S16-R U74HCT595G-S16-R U74HCT595L-P16-R U74HCT595G-P16-R Package SOP-16 TSSOP-16 CMOS IC SOP-16 TSSOP-16 Packing Tape Reel Tape Reel  MARKING www.
unisonic.
com.
tw Copyright © 2022 Unisonic Technologies Co.
, Ltd 1 of 6 QW-R502-666.
D U74HCT595  PIN CONFIGURATION CMOS IC OE SRCLR  FUNCTION TABLE FUNCTION SRCLK A Low-Level on SRCLR only affects the shift X registers.
Empty shift register loaded into storage register.
X Shift register clear.
Parallel outputs in high-impedance OFF-state X Logic high level shifted into the first shift register.
Contents of all shift register stages shifted through, ↑ e.
g.
previous state of stage G(internal QG’) appears on the serial output(QH’).
Contents of shift register stages (internal Qn’) are transferred to the storage register and parallel X output stages.
Contents of shift register shifted through.
Previous contents of the shift register is transferred to the ↑ storage register and the parallel output stages.
Note:H : HIGH voltage level.
L : LOW voltage level.
X : Don’t care.
Z : High impedance OFF-state.
NC: No change.
↑ : Low-to-High transition.
↓ : High-to-Low transition.
INPUTS RCLK OE SRCLR X...


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