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ADL5303

Analog Devices
Part Number ADL5303
Manufacturer Analog Devices
Description Low Cost Logarithmic Converter
Published Feb 9, 2013
Detailed Description Data Sheet FEATURES Optimized for fiber optic photodiode interfacing 8 full decades of range Law conformance: 0.1 dB fro...
Datasheet PDF File ADL5303 PDF File

ADL5303
ADL5303


Overview
Data Sheet FEATURES Optimized for fiber optic photodiode interfacing 8 full decades of range Law conformance: 0.
1 dB from 1 nA to 1 mA Single-supply operation: 3.
0 V to 5.
5 V Complete and temperature stable Accurate laser trimmed scaling Logarithmic slope of 10 mV/dB (at the VLOG pin) Basic logarithmic intercept at 100 pA Easy adjustment of slope and intercept Output bandwidth of 10 MHz, 15 V/µs slew rate Miniature 16-lead package (LFCSP) Low power: ~4.
5 mA quiescent current (enabled) APPLICATIONS High accuracy optical power measurement Wide range baseband log compression Versatile detector for APC loops GENERAL DESCRIPTION The ADL5303 is a monolithic logarithmic detector optimized for the measurement of low frequency signal power in fiber optic systems and offers a large dynamic range in a versatile and easily used form.
Wide measurement range and accuracy are achieved using proprietary design and precise laser trimming.
The ADL5303 requires only a single positive supply, VPS, of 5 V.
When using low supply voltages, the log slope can be altered to fit the available span.
Low quiescent current and chip disable facilitate use in battery-operated applications.
The input current, IPD, flows in the collector of an optimally scaled NPN transistor, connected in a feedback path around a low offset JFET amplifier.
The current summing input node operates at a constant voltage, independent of current, with a default value of 0.
5 V; this may be adjusted over a wide range.
An adaptive biasing scheme is provided for reducing photodiode dark current at very low light input levels.
The VPDB pin applies approximately 0.
1 V reverse bias across the photodiode for IPD = 100 pA, rising linearly to 2.
0 V of reverse bias at IPD = 10 mA to improve response time at higher power levels.
The 160 dB Range, 100 pA to 10 mA Logarithmic Converter ADL5303 SIMPLIFIED BLOCK DIAGRAM VPDB 5 VSUM 2 IPD INPT 3 VSUM 4 VPS2 10 PDB PWDN 16 BIAS VPS1 12 ADL5303 VREF VREF 6 ~10kΩ 0.
5V VLOG TEM...



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