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74LS114A

Motorola
Part Number 74LS114A
Manufacturer Motorola
Description DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
Published Jan 24, 2014
Detailed Description SN54/74LS114A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/ 74LS114A offers common clock and common clear inputs a...
Datasheet PDF File 74LS114A PDF File

74LS114A
74LS114A

Overview
SN54/74LS114A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54/ 74LS114A offers common clock and common clear inputs and individual J, K, and set inputs.
These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted.
The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up times are observed.
Input data is transferred to the outputs on the negative-going edge of the clock pulse.
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY LOGIC DIAGRAM (Each Flip-Flop) J SUFFIX CERAMIC CASE 632-08 14 Q 5...


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