DatasheetsPDF.com

WT751002S

Weltrend
Part Number WT751002S
Manufacturer Weltrend
Description PC POWER SUPPLY SUPERVISOR
Published Jan 30, 2014
Detailed Description °¶¸à¹q¤lªÑ¥÷¦³--¤½¥q Weltrend Semiconductor, Inc. ` WT751002S PC POWER SUPPLY SUPERVISOR Data Sheet REV. 1.00 Novembe...
Datasheet PDF File WT751002S PDF File

WT751002S
WT751002S


Overview
°¶¸à¹q¤lªÑ¥÷¦³--¤½¥q Weltrend Semiconductor, Inc.
` WT751002S PC POWER SUPPLY SUPERVISOR Data Sheet REV.
1.
00 November 04, 2005 The information in this document is subject to change without notice.
©Weltrend Semiconductor, Inc.
All Rights Reserved.
·s¦Ë¥«¬ì¾Ç¤u·~¶é°Ï¤u·~ªF¤E¸ô 24¸¹2¼Ó th 2F, No.
24, Industry E.
9 RD.
, Science-Based Industrial Park, Hsin-Chu, Taiwan TEL:886-3-5780241 FAX:886-3-5794278.
5770419 Email:support@weltrend.
com.
tw Free Datasheet http://www.
datasheet4u.
com/ WT751002S Rev.
1.
00 GENERAL DESCRIPTION The WT751002S provides protection circuits, power good output (PGO), fault protection latch (FPOB), and a protection detector function (PSONB) control.
It can minimize external components of switching power supply systems in personal computer.
The Over Voltage Detector (OVD) monitors V33, V5 and VCC input voltage level.
The Under Voltage Detector (UVD) monitors V33 and V5 input voltage level.
When OVD or UVD detect the fault voltage level, the FPOB is latched HIGH and PGO go low.
When PGI detect the fault voltage level, the FPOB would be kept LOW and PGO go low.
The latch can be reset by PSONB go HIGH.
There is 3.
5 ms delay time for PSONB turn off FPOB.
When PGI and OVD and UVD detect the right voltage level, the power good output (PGO) will be issue.
FEATURES • • • • • • • • • • The Over Voltage Detector (OVD) monitors V33, V5 and VCC input voltage.
The Under Voltage Detector (UVD) monitors V33 and V5 input voltage.
Both of the power good output (PGO) and fault protection latch (FPOB) are Open Drain Output.
75 ms time delay for UVD.
300 ms time delay for PGO.
38 ms for PSONB input signal De–bounce.
73 us for PGI and UVD internal signal De–glitches.
55 us for OVD internal signal De–glitches.
3.
5 ms time delay for PSONB turn-off FPOB.
The UVD would been disabled when PGI < 0.
95V.
PIN ASSIGNMENT AND PACKAGE TYPE WT751002S PGI GND FPOB PSONB 1 2 3 4 8 7 6 5 PGO VCC V5 V33 ORDERING INFORMATION PACKAGE 8–Pin Plastic DIP 8–Pin Plastic SOP CHIP...



Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)