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EV10AQ190

Part Number	EV10AQ190
Manufacturer	e2v
Description	Low power QUAD 10-bit 1.25 Gsps ADC operating up to 5 Gsps
Published	Feb 27, 2014
Detailed Description	EV10AQ190 EV10AQ190 Low power QUAD 10-bit 1.25 Gsps ADC operating up to 5 Gsps Datasheet - Preliminary Main Features ...
Datasheet	EV10AQ190 PDF File

Overview

EV10AQ190 EV10AQ190 Low power QUAD 10-bit 1.
25 Gsps ADC operating up to 5 Gsps Datasheet - Preliminary Main Features Quad ADC with 10-bit resolution using true e2v single core technology − 1.
25 Gsps Sampling Rate in 4-channel mode − 2.
5 Gsps Sampling Rate in 2-channel mode − 5 Gsps Sampling Rate in 1-channel mode − Built-in four-by-four Cross Point Switch Single 2.
5 GHz Differential Symmetrical Input Clock 500 mVpp Analog Input (Differential AC or DC Coupled) ADC Master Reset (LVDS) Double Data Rate Output Protocol LVDS Output format Digital Interface (SPI) with Reset Signal: − Channel Mode Selection − Selectable bandwidth (2 available settings) − Gain, Offset, Phase Control − Standby Mode (full or partial) − Binary or Gray Coding Selection − Test Modes (ramp, flashing “1”) Power Supplies: single 3.
3V (1.
8V Outputs) Reduced clock induced transients on power supply pins due to BiCMOS Silicon technology Power Dissipation: 1.
4W per channel EBGA380 Package (RoHS, 1.
27 mm Pitch) Performance Selectable Full Power Input Bandwidth (-3 dB) up to 3 GHz (4-2-1 channel mode) Band flatness: ± 0.
5 dB from DC to 30% of full Power Input bandwidth Channel-To-Channel Isolation: > 60 dB 4-channel mode (Fsampling = 1.
25 Gsps, -1 dBFS) − ENOB = 8.
8 bit, SFDR = 65 dBc, SNR = 56 dB, DNL = ±0.
3 LSB, INL = ±1.
5 LSB (Fin= 100 MHz) − ENOB = 8.
5 bit, SFDR = 63 dBc, SNR = 54 dB (Fin= 620 MHz) − ENOB = 7.
8 bit, SFDR = 57 dBc, SNR = 50 dB (Fin= 1.
2 GHz) 2-channel mode or 1-channel mode (Fsampling = 2.
5 Gsps and 5 Gsps respectively) − ENOB = 8.
7 bit, SFDR = 63 dBc, SNR = 56 dB, DNL = ±0.
3 LSB, INL = ±1.
5 LSB (Fin= 100 MHz) − ENOB = 8.
4 bit, SFDR = 61 dBc, SNR = 54 dB (Fin= 620 MHz) − ENOB = 7.
7 bit, SFDR = 55 dBc, SNR = 50 dB (Fin= 1.
2 GHz) BER: 10-16 at Full speed Band flatness: ± 0.
5 dB from DC to 30% of full Power Input bandwidth Low pipe line delay: 4-channel: 9 cycles, 2-channel:9-10 cycles, -channel: 8.
5-10 cycles 1 BDC-10/09 – Preliminary e2v semico...

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