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IS61QDB42M18

Part Number	IS61QDB42M18
Manufacturer	ISSI
Description	36 Mb (1M x 36 & 2M x 18) QUAD (Burst of 4) Synchronous SRAMs
Published	Mar 10, 2014
Detailed Description	36 Mb (1M x 36 & 2M x 18) QUAD (Burst of 4) Synchronous SRAMs . ISSI May 2005 ® Features • 1M x 36 or 2M x 18. • On-c...
Datasheet	IS61QDB42M18 PDF File

Overview

36 Mb (1M x 36 & 2M x 18) QUAD (Burst of 4) Synchronous SRAMs .
ISSI May 2005 ® Features • 1M x 36 or 2M x 18.
• On-chip delay-locked loop (DLL) for wide data valid window.
• Separate read and write ports with concurrent read and write operations.
• Synchronous pipeline read with late write operation.
• Double data rate (DDR) interface for read and write input ports.
• Fixed 4-bit burst for read and write operations.
• Clock stop support.
• Two input clocks (K and K) for address and control registering at rising edges only.
• Two input clocks (C and C) for data output control.
• Two echo clocks (CQ and CQ) that are delivered simultaneously with data.
• +1.
8V core power supply and 1.
5, 1.
...

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