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EMB61


Part Number EMB61
Manufacturer ROHM
Title Complex Digital Transistors
Description EMB61 Complex Digital Transistors (Bias Resistor Built-in Transistors) Datasheet l Outline Parameter VCC IC(MAX.) R1 R2 DTr1 and DTr2 -50V -100m...
Features 1) Two DTA014E chips in a EMT6 package. 2) Transister elements are independent, eliminating interface. 3) Mounting cost and area can be cut in half. 4) Lead Free/RoHS Compliant. l Inner circuit l Application Switching circuit, Inverter circuit, Interface circuit, Driver circuit l Packaging specif...

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EMB6 : EMB6 / UMB6N PNP -100mA -50V Complex Digital Transistors (Bias Resistor Built-in Transistors) Datasheet Outline Parameter Tr1 and Tr2 EMT6 UMT6 VCC IC(MAX.) R1 R2 50V 100mA 47k 47k (6) (5) (1) (4) (2) (3) EMB6 (SC-107C) (6) (5) for(4) (1) (2) (3) UMB6N SOT-363 (SC-88) Features 1) Built-In Biasing Resistors, R1 = R2 = 47k. d 2) Two DTA144E chips in one package. 3) Built-in bias resistors enable the configuration of e an inverter circuit without connecting external d input resistors (see inner circuit). 4) The bias resistors consist of thin-film resistors n s with complete isolation to allow negative biasing e n of the input. They also have the advantage of completely el.

EMB60 : EMB60 Complex Digital Transistors (Bias Resistor Built-in Transistors) Datasheet l Outline Parameter VCC IC(MAX.) R1 R2 DTr1 and DTr2 -50V -100mA 2.2kΩ 47kΩ EMT6     EMB60 (SC-107C)                             l Features 1) Two DTA023J chips in a EMT6 package. 2) Transister elements are independent, eliminating interface. 3) Mounting cost and area can be cut in half. 4) Lead Free/RoHS Compliant. l Inner circuit l Application Switching circuit, Inverter circuit, Interface circuit, Driver circuit l Packaging specifications                                             Part No. EMB60   Package EMT6   Package size 1616   Taping code T2R   Reel size Tape width (mm) (mm) 180   Basic .

EMB60A06G : EMB60A06G Dual N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 60V RDSON (MAX.) 60mΩ ID 5A UIS, Rg 100% Tested Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage VGS Continuous Drain Current Pulsed Drain Current1 TA = 25 °C ID TA = 100 °C IDM Avalanche Current IAS Avalanche Energy L = 0.1mH, ID=12A, RG=25Ω EAS Repetitive Avalanche Energy2 L = 0.05mH EAR Power Dissipation TA = 25 °C TA = 100 °C Operating Junction & Storage Temperature Range PD Tj, Tstg 100% UIS testing in condition of VD=30V, L=0.1mH, VG=10V, IL=5A, Rated VDS=60V.

EMB60A06S : EMB60A06S Dual N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 60V RDSON (MAX.) 60mΩ ID 5A UIS, 100% Tested Pb‐Free Lead Plating ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage VGS Continuous Drain Current Pulsed Drain Current1 TC = 25 °C ID TC = 100 °C IDM Avalanche Current IAS Avalanche Energy L = 0.1mH, ID=7.5A, RG=25Ω EAS Repetitive Avalanche Energy2 L = 0.05mH EAR Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range PD Tj, Tstg 100% UIS testing in condition of VD=30V, L=0.1mH, VG=10V, IL=5A, Rated VDS=60V N‐CH THERMAL RES.

EMB60A06V : EMB60A06V Dual N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 60V RDSON (MAX.) 60mΩ ID 6A UIS, Rg 100% Tested Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Gate‐Source Voltage VGS ±20 Continuous Drain Current Pulsed Drain Current1 TA = 25 °C 6 ID TA = 100 °C 4.3 IDM 24 Avalanche Current IAS 12 Avalanche Energy L = 0.1mH, ID=10A, RG=25Ω EAS 5 Repetitive Avalanche Energy2 L = 0.05mH EAR 2.5 Power Dissipation TA = 25 °C TA = 100 °C Operating Junction & Storage Temperature Range PD Tj, Tstg 2.27 0.9 ‐55 to 150 100% UIS testing .

EMB60B03G : Dual P‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS ‐30V RDSON (MAX.) 60mΩ ID ‐5A Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TA = 25 °C TA = 100 °C Power Dissipation TA = 25 °C TA = 100 °C Operating Junction & Storage Temperature Range VGS ID IDM PD Tj, Tstg EMB60B03G LIMITS ±20 ‐5 ‐4 ‐20 2 0.8 ‐55 to 150 UNIT V A W °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Case RJC Junction‐to‐Ambient3 RJA 1Pulse width limited by maximum junction temperature. 2Du.

EMB60C06G :     N & P‐Channel Logic Level Enhancement Mode Field Effect Transistor  Product Summary:      N‐CH  P‐CH  BVDSS  RDSON (MAX.)  60V  ‐60V  60mΩ  90mΩ  ID  5A  ‐4A      Pb‐Free Lead Plating & Halogen Free    ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)  PARAMETERS/TEST CONDITIONS  SYMBOL  Gate‐Source Voltage  VGS  Continuous Drain Current  Pulsed Drain Current1  TA = 25 °C  TA = 100 °C  Power Dissipation  TA = 25 °C  TA = 100 °C  Operating Junction & Storage Temperature Range      THERMAL RESISTANCE RATINGS  THERMAL RESISTANCE  SYMBOL  Junction‐to‐Case  RJC  Junction‐to‐Ambient3  RJA  1Pulse width limited by maximum junction temperature.  2Duty cycle.

EMB60N06A : N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 60V D RDSON (MAX.) 60mΩ ID 12A G UIS, Rg 100% Tested S Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 0.1mH, ID=12A, RG=25Ω L = 0.05mH Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range VGS ID IDM IAS EAS EAR PD Tj, Tstg THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Case RJC Junction‐t.

EMB60N06C : .

EMB60N06CS : .

EMB60N06H : N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 60V D RDSON (MAX.) 58mΩ ID 15A G UIS, Rg 100% Tested S Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TC = 25 °C TC = 100 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 0.1mH, ID=12A, RG=25Ω L = 0.05mH Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range VGS ID IDM IAS EAS EAR PD Tj, Tstg THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Case RJC Junction‐t.

EMB60N06J : N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 60V D RDSON (MAX.) 60mΩ ID 3.5A G UIS, Rg 100% Tested S Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TA = 25 °C TA = 70 °C Power Dissipation TA = 25 °C TA = 70 °C Operating Junction & Storage Temperature Range VGS ID IDM PD Tj, Tstg THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Ambient RJA 1Pulse width limited by maximum junction temperature. 2Duty cycle  1% TYPICAL EMB60N06J LIMITS ±20 3.5 2.3 14 1.25 0.83 .

EMB60N06V :     N‐Channel Logic Level Enhancement Mode Field Effect Transistor  Product Summary:  BVDSS  60V  D RDSON (MAX.)  60mΩ  ID  8A  G   UIS, Rg 100% Tested  S Pb‐Free Lead Plating & Halogen Free    ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)  PARAMETERS/TEST CONDITIONS  SYMBOL  Gate‐Source Voltage  Continuous Drain Current  Pulsed Drain Current1  TA = 25 °C  TA = 100 °C  Avalanche Current  Avalanche Energy  Repetitive Avalanche Energy2  L = 0.1mH, ID=6A, RG=25Ω  L = 0.05mH  Power Dissipation  TA = 25 °C  TA = 100 °C  Operating Junction & Storage Temperature Range  VGS  ID  IDM  IAS  EAS  EAR  PD  Tj, Tstg  EMB60N06V LIMITS  ±20  8  6  32  6  1.8  0.9  .

EMB60N10A : .

EMB60N10G : N‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS 100V D RDSON (MAX.) 60mΩ ID 6A G UIS, Rg 100% Tested S Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL Gate‐Source Voltage Continuous Drain Current Pulsed Drain Current1 TA = 25 °C TA = 100 °C Avalanche Current Avalanche Energy Repetitive Avalanche Energy2 L = 0.1mH, ID=10A, RG=25Ω L = 0.05mH Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range VGS ID IDM IAS EAS EAR PD Tj, Tstg THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL Junction‐to‐Case RJC Junction‐t.




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