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HD74ALVCH162334

Hitachi Semiconductor
Part Number HD74ALVCH162334
Manufacturer Hitachi Semiconductor
Description 16-bit Universal Bus Driver with 3-state Outputs
Published Mar 23, 2005
Detailed Description HD74ALVCH162334 16-bit Universal Bus Driver with 3-state Outputs ADE-205-210 (Z) Preliminary 1st. Edition December 1997...
Datasheet PDF File HD74ALVCH162334 PDF File

HD74ALVCH162334
HD74ALVCH162334

Overview
HD74ALVCH162334 16-bit Universal Bus Driver with 3-state Outputs ADE-205-210 (Z) Preliminary 1st.
Edition December 1997 Description This HD74ALVCH162334 is a 16-bit universal bus driver is designed for 2.
3 V to 3.
6 V VCC operation.
Data flow from A to Y is controlled by the output enable (O E) input.
The device operates in the transparent mode when the latch enable (LE) input is low.
When LE is high, the A data is latched if the clock (CLK) input is held at a high or low logic level.
If LE is high, the A data is stored in the latch/flip flop on the low to high transition of CLK.
When OE is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
All outputs, which are designed to sink up to 12 mA, include 26 Ω resistors to reduce overshoot and undershoot.
Features • VCC = 2.
3 V to 3.
6 V • Typical VOL ground bounce < 0.
8 V (@VCC = 3.
3 V, Ta = 25°C) • Typical VOH undershoot > 2.
0 V (@VCC = 3.
3 V, Ta = 25°C) • High output current ±12 mA (@VCC = 3.
0 V) • Bus hold on data inputs eliminates the need for external pullup / pulldown resistors • All outputs have equivalent 26 Ω series resistors, so no external resistors are required HD74ALVCH162334 Function Table Inputs OE H L L L L L LE X L L H H H CLK X X X ↑ ↑ L or H A X L H L H X Z L H L H Y0 *1 Output Y H : High level L : Low level X : Immaterial Z : High impedance ↑ : Low to high transition Note: 1.
Output level before the indicated steady state input conditions were established.
2 HD74ALVCH162334 Pin Arrangement OE 1 Y1 2 Y2 3 GND 4 Y3 5 Y4 6 VCC 7 Y5 8 Y6 9 GND 10 Y7 11 Y8 12 Y9 13 Y10 14 GND 15 Y11 16 Y12 17 VCC 18 Y13 19 Y14 20 GND 21 Y15 22 Y16 23 NC 24 48 CLK 47 A1 46 A2 45 GND 44 A3 43 A4 42 VCC 41 A...


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