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HD74ALVCH16373

Hitachi Semiconductor
Part Number HD74ALVCH16373
Manufacturer Hitachi Semiconductor
Description 16-bit Transparent D-type Latches with 3-state Outputs
Published Mar 23, 2005
Detailed Description HD74ALVCH16373 16-bit Transparent D-type Latches with 3-state Outputs ADE-205-138A (Z) 2nd. Edition December 1999 Descr...
Datasheet PDF File HD74ALVCH16373 PDF File

HD74ALVCH16373
HD74ALVCH16373


Overview
HD74ALVCH16373 16-bit Transparent D-type Latches with 3-state Outputs ADE-205-138A (Z) 2nd.
Edition December 1999 Description The HD74ALVCH16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
It can be used as two 8-bit latches or one 16-bit latch.
When the latch enable (LE) input is high, the Q outputs follow the data (D) inputs.
When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Features • VCC = 2.
3 V to 3.
6 V • Typical VOL ground bounce < 0.
8 V (@VCC = 3.
3 V, Ta = 25°C) • Typical VOH undershoot > 2.
0 V (@VCC = 3.
3 V, Ta = 25°C) • Bus hold on data inputs eliminates the need for external pullup / pulldown resistors Function Table Inputs OE L L L H LE H H L X D H L X X H L Q0 *1 Z Output Q H : High level L : Low level X : Immaterial Z : High impedance Note: 1.
Output level before the indicated steady state input conditions were established.
HD74ALVCH16373 Pin Arrangement 1OE 1 1Q1 2 1Q2 3 GND 4 1Q3 5 1Q4 6 V CC 7 1Q5 8 1Q6 9 GND 10 1Q7 11 1Q8 12 2Q1 13 2Q2 14 GND 15 2Q3 16 2Q4 17 V CC 18 2Q5 19 2Q6 20 GND 21 2Q7 22 2Q8 23 2OE 24 48 1LE 47 1D1 46 1D2 45 GND 44 1D3 43 1D4 42 VCC 41 1D5 40 1D6 39 GND 38 1D7 37 1D8 36 2D1 35 2D2 34 GND 33 2D3 32 2D4 31 VCC 30 2D5 29 2D6 28 GND 27 2D7 26 2D8 25 2LE (Top view) 2 HD74ALVCH16373 Absolute Maximum Ratings Item Supply voltage Input voltage *1 *1, 2 Symbol VCC VI VO I IK I OK IO I CC or IGND PT Tstg Ratings –0.
5 to 4.
6 –0.
5 to 4.
6 –0.
5 to VCC +0.
5 –50 ±50 ±50 ±100 0.
85 –65 to 150 Unit V V V mA mA mA mA W °C Conditions Output voltage Input clamp current Output clamp current Continuous output current VCC, GND current / pin Maximum power dissipation at Ta = 55°C (in still air) *3 Storage temperature Notes: VI < 0 VO < 0 or VO > VCC VO = 0 to VCC TSSOP Stresses beyond those listed under “absolute maximum ra...



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