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HCS190MS

Intersil Corporation
Part Number HCS190MS
Manufacturer Intersil Corporation
Description Radiation Hardened Synchronous 4-Bit Up/Down Counter
Published Mar 23, 2005
Detailed Description HCS190MS September 1995 Radiation Hardened Synchronous 4-Bit Up/Down Counter Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL...
Datasheet PDF File HCS190MS PDF File

HCS190MS
HCS190MS


Overview
HCS190MS September 1995 Radiation Hardened Synchronous 4-Bit Up/Down Counter Pinouts 16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16 TOP VIEW P1 Q1 Q0 CE U/D Q2 Q3 GND 1 2 3 4 5 6 7 8 16 VCC 15 P0 14 CP 13 RC 12 TC 11 PL 10 P2 9 P3 Features • • • • • • • • • • • 3 Micron Radiation Hardened SOS CMOS Total Dose 200K RAD (Si) SEP Effective LET No Upsets: >100 MEV-cm2/mg Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) Dose Rate Survivability: >1 x 1012 RAD (Si)/s Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse Latch-Up Free Under Any Conditions Military Temperature Range: -55oC to +125oC Significant Power Reduction Compared to LSTTL ICs DC Operating Voltage Range: 4.
5V to 5.
5V Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min Input Current Levels Ii ≤ 5µA at VOL, VOH • Description The Intersil HCS190MS is an asynchronously presettable BCD Decade synchronous counter.
Presetting the counter to the number on the preset data inputs (P0 - P3) is accomplished by a low on the parallel load input (PL).
Counting occurs when (PL) is high, Count Enable (CE) is low and the Up/Down (U/D) input is either low for up-counting or high for down-counting.
The counter is incremented or decremented synchronously with the low-to-high transition of the clock.
When an overflow or underflow of the counter occurs, the Terminal Count output (TC), which is low during counting, goes high and remains high for one clock cycle.
This output can be used for lookahead carry in high speed cascading.
The TC output also initiates the Ripple Clock output (RC) which, normally high, goes low and remains low for the low-level portion of the clock pulse.
These counter can be cascaded using the Ripple Carry output.
If the decade counter is preset to an illegal state or assumes an illegal state when power is applied, it will return to the normal sequence in one or two counts.
The HCS190MS utilizes advanced CMOS/SOS technology to achieve high-speed operat...


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