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HCTS21MS

Intersil Corporation
Part Number HCTS21MS
Manufacturer Intersil Corporation
Description Radiation Hardened Dual 4-Input AND Gate
Published Mar 23, 2005
Detailed Description HCTS21MS October 1995 Radiation Hardened Dual 4-Input AND Gate Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE ...
Datasheet PDF File HCTS21MS PDF File

HCTS21MS
HCTS21MS

Overview
HCTS21MS October 1995 Radiation Hardened Dual 4-Input AND Gate Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-183S CDIP2-T14, LEAD FINISH C TOP VIEW A1 1 B1 2 NC 3 C1 4 D1 5 Y1 6 GND 7 14 VCC 13 D2 12 C2 11 NC 10 B2 9 A2 8 Y2 Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >10 10 RAD(Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Military Temperature Range: -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.
5V to 5.
5V • LSTTL Input Compatibility - VIL = 0.
8V Max - VIH = VCC/2 Min • Input Current Levels Ii ≤ 5µA at VOL, VOH 14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-183S CDFP3-F14, LEAD FINISH C TOP VIEW A1 B1 NC C1 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC D2 C2 NC B2 A2 Y2 Description The Intersil HCTS21MS is a Radiation Hardened Dual Input AND Gate.
A high on all inputs forces the output to a High state.
The HCTS21MS utilizes advanced CMOS/SOS technology to achieve high-speed operation.
This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS21MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
D1 Y1 GND Functional Diagram An Bn Yn Ordering Information PART NUMBER HCTS21DMSR TEMPERATURE RANGE -55oC to +125oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample PACKAGE 14 Lead SBDIP Cn Dn TRUTH TABLE 14 Lead Ceramic Flatpack 14 Lead SBDIP INPUTS An L X Bn X L X X H Cn X X L X H Dn X X X L H OUTPUTS Yn L L L L H HCTS21KMSR -55oC to +125oC HCTS21D/ Sample HCTS21K/ Sample HCTS21HMSR +25oC +25oC Sample 14 Lead Ceramic Flatpack Die X X H +25oC Die NOTE: L = Logic Level Low, H = Logic level High, X = Don’t Care CAUTION: These devices are sensitive to elect...


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