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TK72E12N1

Toshiba Semiconductor
Part Number TK72E12N1
Manufacturer Toshiba Semiconductor
Description Silicon N-Channel MOSFET
Published Sep 10, 2014
Detailed Description MOSFETs Silicon N-channel MOS (U-MOS-H) TK72E12N1 1. Applications • Switching Voltage Regulators 2. Features (1) Low dr...
Datasheet PDF File TK72E12N1 PDF File

TK72E12N1
TK72E12N1

Overview
MOSFETs Silicon N-channel MOS (U-MOS-H) TK72E12N1 1.
Applications • Switching Voltage Regulators 2.
Features (1) Low drain-source on-resistance: RDS(ON) = 3.
6 mΩ (typ.
) (VGS = 10 V) (2) Low leakage current: IDSS = 10 µA (max) (VDS = 120 V) (3) Enhancement mode: Vth = 2.
0 to 4.
0 V (VDS = 10 V, ID = 1.
0 mA) 3.
Packaging and Internal Circuit TK72E12N1 1: Gate 2: Drain (heatsink) 3: Source TO-220 4.
Absolute Maximum Ratings (Note) (Ta = 25 unless otherwise specified) Characteristics Symbol Rating Unit Drain-source voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulsed) Power dissipation Single-pulse avalanche energy Avalanche current Channel temperature Storage temperature (Silicon limit) (t = 1 ms) (Tc = 25) (Note 1), (Note 2) (Note 1), (Note 3) (Note 1) (Note 4) VDSS VGSS ID ID IDP PD EAS IAR Tch Tstg 120 V ±20 179 A 72 360 255 W 256 mJ 72 A 150  -55 to 150 Note: Using continuously under heavy loads (e.
g.
the application of high temperature/current/voltage and the significant change in temperature, etc.
) may cause this product to decrease in the reliability significantly even if the operating conditions (i.
e.
operating temperature/current/voltage, etc.
) are within the absolute maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.
e.
reliability test report and estimated failure rate, etc).
Start of commercial production 2012-07 1 2014-06-30 Rev.
4.
0 5.
Thermal Characteristics Characteristics Channel-to-case thermal resistance Channel-to-ambient thermal resistance Note 1: Ensure that the channel temperature does not exceed 150.
Note 2: Limited by silicon chip capability.
Package limit is 100 A.
Note 3: Device mounted with heatsink so that Rth(ch-a) becomes 2.
77/W.
Note 4: VDD = 80 V, Tch = 25 (initial), L = 48.
3 µH, IAR = 72 A TK72E12N1 Sy...


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