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SMP20P10

Siliconix
Part Number SMP20P10
Manufacturer Siliconix
Description P-Channel Enhancement-Mode Transistor
Published Sep 26, 2014
Detailed Description SMP20P10 P-Channel Enhancement-Mode Transistor Product Summary V(BR)DSS (V) –100 TO-220AB rDS(on) (W) 0.20 ID (A) –20 ...
Datasheet PDF File SMP20P10 PDF File

SMP20P10
SMP20P10


Overview
SMP20P10 P-Channel Enhancement-Mode Transistor Product Summary V(BR)DSS (V) –100 TO-220AB rDS(on) (W) 0.
20 ID (A) –20 D G Drain Connected to Tab G D S Top View S N-Channel MOSFET Absolute Maximum Ratings (TC = 25_C Unless Otherwise Noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150_C) Pulsed Drain Current Avalanche Current Repetitive Avalanche Energya Maximum Power Dissipation Operating Junction and Storage Temperature Range Lead Temperature (1/16” from case for 10 sec.
) L = 0.
05 mH TC = 25_C TC = 100_C TC = 25_C TC = 100_C Symbol VDS VGS ID IDM IAR EAR PD TJ, Tstg TL Limit –100 "20 –20 –12 –80 –20 20 125 50 –55 to 150 300 Unit V A mJ W _C Thermal Resistance Ratings Parameter Maximum Junction-to-Ambient Maximum Junction-to-Case Case-to-Sink Notes: a.
Duty cycle v1% Subsequent updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600.
Please request FaxBack document #70287.
Symbol RthJA RthJC RthCS Typical Maximum 80 1.
0 Unit _C/W 1.
0 Siliconix P-35259—Rev.
B, 16-May-94 1 SMP20P10 Specifications (TJ = 25_C Unless Otherwise Noted) Limit Parameter Static Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Currentb Drain Source On-State Drain-Source On State Resistanceb Forward Transconductance b V(BR)DSS VGS(th) IGSS IDSS ID(on) rDS(on) DS( ) gfs VGS = 0 V, ID = –250 mA VDS = VGS, ID = –250 mA VDS = 0 V, VGS = "12 V VDS = –80 V, VGS = 0 V VDS = –80 V, VGS = 0 V, TJ = 125_C VDS = –10 V, VGS = –10 V VGS = –10 V, ID = –12 A VGS = –10 V, ID = –12 A, TJ = 125_C VDS = –15 V, ID = –12 A 4.
8 –20 0.
15 0.
24 6.
7 0.
20 0.
30 –100 –2.
0 –4.
0 "100 –250 –1000 nA mA A W S V Symbol Test Condition Min Typa Max Unit Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Chargec Gate-Source Chargec Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDD = –40 V, RL = 2.
1 W ID ] –19 A, VGEN...



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