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HYMP564S64CP6-E3 Datasheet PDF

Hynix
Part Number HYMP564S64CP6-E3
Manufacturer Hynix
Title 200pin Unbuffered DDR2 SDRAM SO-DIMMs based on 512 Mb
Description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses ...
Features
• JEDEC standard Double Data Rate2 Synchronous DRAMs (DDR2 SDRAMs) with 1.8V +/- 0.1V Power Supply All inputs and outputs are compatible with SSTL_1.8 interface Posted CAS Programmable CAS Latency 3, 4, 5, 6 OCD (Off-Chip Driver Impedance Adjustment) and ODT (On-Die Termination) Fully differential c...

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HYMP564S64CP6-C4 : and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.4 / Jul. 2007 1 1200pin Unbuffered DDR2 SDRAM SO-DIMMs SPEED GRADE & KEY PARAMETERS E3 (DDR2-400) Speed @CL3 Speed @CL4 Speed @CL5 Speed @CL6 CL-tRCD-tRP 400 533 3-3-3 C4 (DDR2-533) 533 533 4-4-4 Y5 (DDR2-667) 400 533 667 5-5-5 S6 (DDR2-800) 533 667 800 5-5-5 S5 (DDR2-800) 533 800 5-5-5 Unit Mbps Mbps Mbps Mbps tCK ADDRESS TABLE Density 256MB 512MB 1GB Organization Ranks 32M x 64 64M x 64 128M x 64 1 2 2 SDRAMs 32Mb x 16 32Mb x 16 64Mb x 8 # of DRAMs 4 8 16 # of row/bank/column Address 13(A0~A12)/2(BA0~BA1)/10(A0~A9) 13(A0~A12.

HYMP564S64CP6-S5 : and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.4 / Jul. 2007 1 1200pin Unbuffered DDR2 SDRAM SO-DIMMs SPEED GRADE & KEY PARAMETERS E3 (DDR2-400) Speed @CL3 Speed @CL4 Speed @CL5 Speed @CL6 CL-tRCD-tRP 400 533 3-3-3 C4 (DDR2-533) 533 533 4-4-4 Y5 (DDR2-667) 400 533 667 5-5-5 S6 (DDR2-800) 533 667 800 5-5-5 S5 (DDR2-800) 533 800 5-5-5 Unit Mbps Mbps Mbps Mbps tCK ADDRESS TABLE Density 256MB 512MB 1GB Organization Ranks 32M x 64 64M x 64 128M x 64 1 2 2 SDRAMs 32Mb x 16 32Mb x 16 64Mb x 8 # of DRAMs 4 8 16 # of row/bank/column Address 13(A0~A12)/2(BA0~BA1)/10(A0~A9) 13(A0~A12.

HYMP564S64CP6-S6 : and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.4 / Jul. 2007 1 1200pin Unbuffered DDR2 SDRAM SO-DIMMs SPEED GRADE & KEY PARAMETERS E3 (DDR2-400) Speed @CL3 Speed @CL4 Speed @CL5 Speed @CL6 CL-tRCD-tRP 400 533 3-3-3 C4 (DDR2-533) 533 533 4-4-4 Y5 (DDR2-667) 400 533 667 5-5-5 S6 (DDR2-800) 533 667 800 5-5-5 S5 (DDR2-800) 533 800 5-5-5 Unit Mbps Mbps Mbps Mbps tCK ADDRESS TABLE Density 256MB 512MB 1GB Organization Ranks 32M x 64 64M x 64 128M x 64 1 2 2 SDRAMs 32Mb x 16 32Mb x 16 64Mb x 8 # of DRAMs 4 8 16 # of row/bank/column Address 13(A0~A12)/2(BA0~BA1)/10(A0~A9) 13(A0~A12.

HYMP564S64CP6-Y5 : and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.4 / Jul. 2007 1 1200pin Unbuffered DDR2 SDRAM SO-DIMMs SPEED GRADE & KEY PARAMETERS E3 (DDR2-400) Speed @CL3 Speed @CL4 Speed @CL5 Speed @CL6 CL-tRCD-tRP 400 533 3-3-3 C4 (DDR2-533) 533 533 4-4-4 Y5 (DDR2-667) 400 533 667 5-5-5 S6 (DDR2-800) 533 667 800 5-5-5 S5 (DDR2-800) 533 800 5-5-5 Unit Mbps Mbps Mbps Mbps tCK ADDRESS TABLE Density 256MB 512MB 1GB Organization Ranks 32M x 64 64M x 64 128M x 64 1 2 2 SDRAMs 32Mb x 16 32Mb x 16 64Mb x 8 # of DRAMs 4 8 16 # of row/bank/column Address 13(A0~A12)/2(BA0~BA1)/10(A0~A9) 13(A0~A12.




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