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AS7C33256NTD16A

Alliance Semiconductor
Part Number AS7C33256NTD16A
Manufacturer Alliance Semiconductor
Description 3.3V 256K X 16/18 SRAM
Published Nov 24, 2014
Detailed Description December 2002 AS7C33256NTD16A AS7C33256NTD18A ® 9 .î 65$0 ZLWK 17'TM Features • Organization: 262,144 word...
Datasheet PDF File AS7C33256NTD16A PDF File

AS7C33256NTD16A
AS7C33256NTD16A

Overview
December 2002 AS7C33256NTD16A AS7C33256NTD18A ® 9 .
î 65$0 ZLWK 17'TM Features • Organization: 262,144 words × 16 or 18 bits • NTD™1 architecture for efficient bus operation • Fast clock speeds to 166 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.
5/4.
0/5.
0 ns • Fast OE access time: 3.
5/4.
0/5.
0 ns • Fully synchronous operation • Flow-through or pipelined mode • Asynchronous output enable control 1 NTD is a trademark of Alliance Semiconductor Corporation.
• Economical 100-pin TQFP package • Byte write enables • Clock enable for operation hold • Multiple chip enables for easy expansion • 3.
3V core power supply • 2.
5V or 3.
3V I/O operation with separate VDDQ • 30 mW typical standby power • Self-timed write cycles • Interleaved or linear burst modes • Snooze mode for standby operation Logic block diagram Pin arrangement for TQFP (top view) A A CE0 CE1 NC NC BWb BWa CE2 VDD VSS CLK R/W CEN OE ADV/LD NC NC A A A[17:0] 18 CE0 CE1 CE2 R/W BWa BWb ADV / LD FT LBO ZZ D A...


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