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GTLP16617

Fairchild Semiconductor
Part Number GTLP16617
Manufacturer Fairchild Semiconductor
Description 17-Bit TTL/GTLP Synchronous Bus Transceiver
Published Mar 23, 2005
Detailed Description GTLP16617 17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock June 1997 Revised October 1998 GTLP16617 17-...
Datasheet PDF File GTLP16617 PDF File

GTLP16617
GTLP16617

Overview
GTLP16617 17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock June 1997 Revised October 1998 GTLP16617 17-Bit TTL/GTLP Synchronous Bus Transceiver with Buffered Clock General Description The GTLP16617 is a 17-bit registered synchronous bus transceiver that provides TTL to GTLP signal level translation.
It allows for transparent, latched and clocked modes of data flow and provides a buffered GTLP (CLKOUT) clock output from the TTL CLKAB.
The device provides a high speed interface between cards operating at TTL logic levels and a backplane operating at GTLP logic levels.
High speed backplane operation is a direct result of GTLP’s reduced output swing (<1V), reduced input threshold levels and output edge rate control.
The edge rate control minimizes bus settling time.
GTLP is a Fairchild Semiconductor derivative of the Gunning Transceiver logic (GTL) JEDEC standard JESD8-3.
Fairchild’s GTLP has internal edge-rate control and is process, voltage, and temperature (PVT) compens...


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